From: Fabio Estevam <festevam@gmail.com>
To: shawnguo@kernel.org
Cc: andrew.smirnov@gmail.com, linux-imx@nxp.com,
kernel@pengutronix.de, Fabio Estevam <festevam@gmail.com>,
linux-arm-kernel@lists.infradead.org, l.stach@pengutronix.de
Subject: [PATCH v2] arm64: dts: imx8mq: Add ECSPI support
Date: Mon, 28 Jan 2019 10:08:13 -0200 [thread overview]
Message-ID: <20190128120813.23933-1-festevam@gmail.com> (raw)
Add support for the three ECSPI ports present on i.MX8MQ.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
---
Changes since v1:
- Make reg a single address (Lucas)
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 39 +++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 892063a7c26c..14949eec2d80 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -26,6 +26,9 @@
serial1 = &uart2;
serial2 = &uart3;
serial3 = &uart4;
+ spi0 = &ecspi1;
+ spi1 = &ecspi2;
+ spi2 = &ecspi3;
};
ckil: clock-ckil {
@@ -381,6 +384,42 @@
#size-cells = <1>;
ranges = <0x30800000 0x30800000 0x400000>;
+ ecspi1: spi@30820000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
+ reg = <0x30820000 0x10000>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_ECSPI1_ROOT>,
+ <&clk IMX8MQ_CLK_ECSPI1_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+
+ ecspi2: spi@30830000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
+ reg = <0x30830000 0x10000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_ECSPI2_ROOT>,
+ <&clk IMX8MQ_CLK_ECSPI2_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+
+ ecspi3: spi@30840000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
+ reg = <0x30840000 0x10000>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_ECSPI3_ROOT>,
+ <&clk IMX8MQ_CLK_ECSPI3_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+
uart1: serial@30860000 {
compatible = "fsl,imx8mq-uart",
"fsl,imx6q-uart";
--
2.17.1
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next reply other threads:[~2019-01-28 12:09 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-28 12:08 Fabio Estevam [this message]
2019-01-28 18:53 ` [PATCH v2] arm64: dts: imx8mq: Add ECSPI support Lucas Stach
2019-02-11 1:43 ` Shawn Guo
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