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From: Steve Capper <Steve.Capper@arm.com>
To: Will Deacon <Will.Deacon@arm.com>
Cc: Catalin Marinas <Catalin.Marinas@arm.com>, nd <nd@arm.com>,
	Qian Cai <cai@lca.pw>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: kernel_page_tables issue with CONFIG_ARM64_USER_VA_BITS_52=y
Date: Fri, 1 Feb 2019 18:53:19 +0000	[thread overview]
Message-ID: <20190201185310.GA8870@capper-debian.cambridge.arm.com> (raw)
In-Reply-To: <20190201134847.GC29903@fuggles.cambridge.arm.com>

On Fri, Feb 01, 2019 at 01:48:47PM +0000, Will Deacon wrote:
> Hi Qian Cai,
> 
> Thanks for reporting this.
> 
> On Thu, Jan 31, 2019 at 11:01:50PM -0500, Qian Cai wrote:
> > On this ThunderX2 server with both,
> > CONFIG_ARM64_USER_VA_BITS_52=y
> > CONFIG_ARM64_PTDUMP_DEBUGFS=y
> > 
> > kernel_page_tables could only print out linear mappings.
> 
> I think this is because the ptdump code is abusing both PTRS_PER_PGD and
> pgd_offset(mm, 0UL) for walking kernel (TTBR1) page tables. That's not going
> to work, because those are still configured as 48-bit.
> 
> Please can you try the diff below? (Steve -- can you have a look as well,
> please?).
> 
> Thanks,
> 
> Will

Hi Will,
This patch looks good to me and worked well for my tests in a model.

FWIW:
Acked-by: Steve Capper <steve.capper@arm.com>
Tested-by: Steve Capper <steve.capper@arm.com>

Cheers,
-- 
Steve

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  reply	other threads:[~2019-02-01 18:53 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-01  4:01 kernel_page_tables issue with CONFIG_ARM64_USER_VA_BITS_52=y Qian Cai
2019-02-01 13:48 ` Will Deacon
2019-02-01 18:53   ` Steve Capper [this message]
2019-02-01 20:49   ` Qian Cai
2019-02-04 10:27     ` Steve Capper
2019-02-04 13:51       ` Ard Biesheuvel
2019-02-04 13:57       ` Qian Cai
2019-02-04 14:15         ` Will Deacon

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