From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED,USER_AGENT_NEOMUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37C5DC43381 for ; Thu, 14 Feb 2019 14:39:07 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 05835222D7 for ; Thu, 14 Feb 2019 14:39:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="jxF0V7Hz" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 05835222D7 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bootlin.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=UKBNGg2Iydi+STRJIiByanYSULgYPJH/a5UlyFme3nQ=; b=jxF0V7HzcBDkqv okqtHFbFCQehGliThZwhoZdJXoPSffU7Zq2y0JH6Q7HZgRae2fwkm/egd1JhpzAYqS3l0gXUEaHbO Y5Tn1yvNPEVP9ok0S0dyWI/bCBSVIjfmevpghcJNUlVZHtDQX9ITW+2KKpu7e4Kd8dCT5hTdQb+2l qklWv/LqvRfoOvfo6YlxS1pKsKnzg1MPech5HPsnqZ3JNKDVxTJrXv95phNU943qs4tN79EKxA+hq T90GbTXNS8a2QKtXFUXj7MH/yMtEjm9sq1Or0u+7x0Vq0Sd9Q2ljQVyqdR4/37muUSbsvhyjZVvil Qc9lRefU0Ha1Nk5W1mrA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1guIAE-0006tA-Ja; Thu, 14 Feb 2019 14:38:58 +0000 Received: from relay9-d.mail.gandi.net ([217.70.183.199]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1guIAB-0006so-GU for linux-arm-kernel@lists.infradead.org; Thu, 14 Feb 2019 14:38:57 +0000 X-Originating-IP: 90.88.30.68 Received: from localhost (aaubervilliers-681-1-89-68.w90-88.abo.wanadoo.fr [90.88.30.68]) (Authenticated sender: maxime.ripard@bootlin.com) by relay9-d.mail.gandi.net (Postfix) with ESMTPSA id 8C4D8FF807; Thu, 14 Feb 2019 14:38:42 +0000 (UTC) Date: Thu, 14 Feb 2019 15:38:42 +0100 From: Maxime Ripard To: Yangtao Li Subject: Re: [PATCH 4/4] arm64: dts: allwinner: h6: Add CPU Operating Performance Points table Message-ID: <20190214143842.nqsh6trwdjxq2ecd@flea> References: <20190214130910.9201-1-tiny.windzz@gmail.com> <20190214130910.9201-5-tiny.windzz@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20190214130910.9201-5-tiny.windzz@gmail.com> User-Agent: NeoMutt/20180716 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190214_063855_841207_8670C021 X-CRM114-Status: GOOD ( 12.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, wens@csie.org, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, On Thu, Feb 14, 2019 at 08:09:10AM -0500, Yangtao Li wrote: > Add an OPP (Operating Performance Points) table for the CPU cores to > enable DVFS (Dynamic Voltage & Frequency Scaling) on the H6. This > information comes from github. > > Signed-off-by: Yangtao Li > --- > arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 61 ++++++++++++++++++++ > 1 file changed, 61 insertions(+) > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > index 57a1390ecdc2..46a4a69eb38f 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > @@ -28,6 +28,8 @@ > enable-method = "psci"; > clocks = <&ccu CLK_CPUX>; > clock-latency-ns = <244144>; /* 8 32k periods */ > + operating-points-v2 = <&cpu_opp_table>; > + #cooling-cells = <2>; > }; > > cpu1: cpu@1 { > @@ -37,6 +39,8 @@ > enable-method = "psci"; > clocks = <&ccu CLK_CPUX>; > clock-latency-ns = <244144>; /* 8 32k periods */ > + operating-points-v2 = <&cpu_opp_table>; > + #cooling-cells = <2>; > }; > > cpu2: cpu@2 { > @@ -46,6 +50,8 @@ > enable-method = "psci"; > clocks = <&ccu CLK_CPUX>; > clock-latency-ns = <244144>; /* 8 32k periods */ > + operating-points-v2 = <&cpu_opp_table>; > + #cooling-cells = <2>; > }; > > cpu3: cpu@3 { > @@ -55,6 +61,61 @@ > enable-method = "psci"; > clocks = <&ccu CLK_CPUX>; > clock-latency-ns = <244144>; /* 8 32k periods */ > + operating-points-v2 = <&cpu_opp_table>; > + #cooling-cells = <2>; > + }; > + }; > + > + cpu_opp_table: opp_table { > + compatible = "operating-points-v2"; > + opp-shared; > + > + opp@480000000 { > + opp-hz = /bits/ 64 <480000000>; > + opp-microvolt = <800000 800000 880000>; > + clock-latency-ns = <244144>; /* 8 32k periods */ > + }; > + > + opp@720000000 { > + opp-hz = /bits/ 64 <720000000>; > + opp-microvolt = <800000 800000 880000>; > + clock-latency-ns = <244144>; /* 8 32k periods */ > + }; > + > + opp@816000000 { > + opp-hz = /bits/ 64 <816000000>; > + opp-microvolt = <800000 800000 880000>; > + clock-latency-ns = <244144>; /* 8 32k periods */ > + }; > + > + opp@888000000 { > + opp-hz = /bits/ 64 <888000000>; > + opp-microvolt = <800000 800000 940000>; > + clock-latency-ns = <244144>; /* 8 32k periods */ > + }; > + > + opp@1080000000 { > + opp-hz = /bits/ 64 <1080000000>; > + opp-microvolt = <840000 840000 1060000>; > + clock-latency-ns = <244144>; /* 8 32k periods */ > + }; > + > + opp@1320000000 { > + opp-hz = /bits/ 64 <1320000000>; > + opp-microvolt = <900000 900000 1160000>; > + clock-latency-ns = <244144>; /* 8 32k periods */ > + }; > + > + opp@1488000000 { > + opp-hz = /bits/ 64 <1488000000>; > + opp-microvolt = <960000 960000 1160000>; > + clock-latency-ns = <244144>; /* 8 32k periods */ > + }; > + > + opp@1800000000 { > + opp-hz = /bits/ 64 <1800000000>; > + opp-microvolt = <1060000 1060000 1160000>; > + clock-latency-ns = <244144>; /* 8 32k periods */ So we definitely want to have that tested, especially since cpufreq can lead to all kind of hard to debug errors (brown-outs, CPU lockups, cache corruption, etc.). I good way to test that would be to use cpufreq-ljt-stress-test here: https://github.com/ssvb/cpuburn-arm/blob/master/cpufreq-ljt-stress-test I'm especially worried about the higher frequencies that will probably make the SoC heat too much Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel