From: Will Deacon <will.deacon@arm.com>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Catalin Marinas <Catalin.Marinas@arm.com>,
Vladimir Murzin <vladimir.murzin@arm.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/2] arm64: virt: Relax GIC version check
Date: Wed, 20 Feb 2019 14:13:27 +0000 [thread overview]
Message-ID: <20190220141327.GC7523@fuggles.cambridge.arm.com> (raw)
In-Reply-To: <20190220134616.7a8da0f5@why.wild-wind.fr.eu.org>
On Wed, Feb 20, 2019 at 01:46:16PM +0000, Marc Zyngier wrote:
> + Will, Catalin
>
> On Wed, 20 Feb 2019 11:43:05 +0000
> Vladimir Murzin <vladimir.murzin@arm.com> wrote:
>
> > Updates to the GIC architecture allow ID_AA64PFR0_EL1.GIC to have
> > values other than 0 or 1. At the moment, Linux is quite strict in the
> > way it handles this field at early boot stage (cpufeature is fine) and
> > will refuse to use the system register CPU interface if it doesn't
> > find the value 1.
> >
> > To help backports (even though the code was correct at the time of writing)
> > Fixes: 021f653791ad17e03f98aaa7fb933816ae16f161 ("irqchip: gic-v3: Initial support for GICv3")
> >
> > Reported-by: Chase Conklin <Chase.Conklin@arm.com>
> > Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
> > ---
> > arch/arm64/kernel/head.S | 3 +--
> > 1 file changed, 1 insertion(+), 2 deletions(-)
> >
> > diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
> > index 15d79a8..eecf792 100644
> > --- a/arch/arm64/kernel/head.S
> > +++ b/arch/arm64/kernel/head.S
> > @@ -539,8 +539,7 @@ set_hcr:
> > /* GICv3 system register access */
> > mrs x0, id_aa64pfr0_el1
> > ubfx x0, x0, #24, #4
> > - cmp x0, #1
> > - b.ne 3f
> > + cbz x0, 3f
> >
> > mrs_s x0, SYS_ICC_SRE_EL2
> > orr x0, x0, #ICC_SRE_EL2_SRE // Set ICC_SRE_EL2.SRE==1
>
> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
>
> Will, Catalin: It is probably too late for the merge window, but on the
> odd chance you could queue it as a fix... Otherwise, this will be a 5.2
> candidate.
Sure, I'll grab it.
Will
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
prev parent reply other threads:[~2019-02-20 14:13 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-20 11:43 [PATCH 1/2] arm64: virt: Relax GIC version check Vladimir Murzin
2019-02-20 11:43 ` [PATCH 2/2] ARM: virt: Align GIC version check with arm64 counterpart Vladimir Murzin
2019-02-20 13:50 ` Marc Zyngier
2019-02-20 14:03 ` Vladimir Murzin
2019-02-20 13:46 ` [PATCH 1/2] arm64: virt: Relax GIC version check Marc Zyngier
2019-02-20 14:13 ` Will Deacon [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190220141327.GC7523@fuggles.cambridge.arm.com \
--to=will.deacon@arm.com \
--cc=Catalin.Marinas@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=marc.zyngier@arm.com \
--cc=vladimir.murzin@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).