* [PATCH 1/2] arm64: virt: Relax GIC version check
@ 2019-02-20 11:43 Vladimir Murzin
2019-02-20 11:43 ` [PATCH 2/2] ARM: virt: Align GIC version check with arm64 counterpart Vladimir Murzin
2019-02-20 13:46 ` [PATCH 1/2] arm64: virt: Relax GIC version check Marc Zyngier
0 siblings, 2 replies; 6+ messages in thread
From: Vladimir Murzin @ 2019-02-20 11:43 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: marc.zyngier
Updates to the GIC architecture allow ID_AA64PFR0_EL1.GIC to have
values other than 0 or 1. At the moment, Linux is quite strict in the
way it handles this field at early boot stage (cpufeature is fine) and
will refuse to use the system register CPU interface if it doesn't
find the value 1.
To help backports (even though the code was correct at the time of writing)
Fixes: 021f653791ad17e03f98aaa7fb933816ae16f161 ("irqchip: gic-v3: Initial support for GICv3")
Reported-by: Chase Conklin <Chase.Conklin@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
---
arch/arm64/kernel/head.S | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 15d79a8..eecf792 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -539,8 +539,7 @@ set_hcr:
/* GICv3 system register access */
mrs x0, id_aa64pfr0_el1
ubfx x0, x0, #24, #4
- cmp x0, #1
- b.ne 3f
+ cbz x0, 3f
mrs_s x0, SYS_ICC_SRE_EL2
orr x0, x0, #ICC_SRE_EL2_SRE // Set ICC_SRE_EL2.SRE==1
--
2.7.4
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^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 2/2] ARM: virt: Align GIC version check with arm64 counterpart
2019-02-20 11:43 [PATCH 1/2] arm64: virt: Relax GIC version check Vladimir Murzin
@ 2019-02-20 11:43 ` Vladimir Murzin
2019-02-20 13:50 ` Marc Zyngier
2019-02-20 13:46 ` [PATCH 1/2] arm64: virt: Relax GIC version check Marc Zyngier
1 sibling, 1 reply; 6+ messages in thread
From: Vladimir Murzin @ 2019-02-20 11:43 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: marc.zyngier
arm64 has got relaxation on GIC version check at early boot stage due
to update of the GIC architecture let's align ARM with that.
To help backports (even though the code was correct at the time of writing)
Fixes: e59941b9b3817c9b1dd6662d903150fe3f3c3b0b ("ARM: 8527/1: virt: enable GICv3 system registers")
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
---
arch/arm/kernel/hyp-stub.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S
index 9ef1759..fd0a723 100644
--- a/arch/arm/kernel/hyp-stub.S
+++ b/arch/arm/kernel/hyp-stub.S
@@ -179,8 +179,8 @@ ARM_BE8(orr r7, r7, #(1 << 25)) @ HSCTLR.EE
@ Check whether GICv3 system registers are available
mrc p15, 0, r7, c0, c1, 1 @ ID_PFR1
ubfx r7, r7, #28, #4
- cmp r7, #1
- bne 2f
+ teq r7, #0
+ beq 2f
@ Enable system register accesses
mrc p15, 4, r7, c12, c9, 5 @ ICC_HSRE
--
2.7.4
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^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH 2/2] ARM: virt: Align GIC version check with arm64 counterpart
2019-02-20 11:43 ` [PATCH 2/2] ARM: virt: Align GIC version check with arm64 counterpart Vladimir Murzin
@ 2019-02-20 13:50 ` Marc Zyngier
2019-02-20 14:03 ` Vladimir Murzin
0 siblings, 1 reply; 6+ messages in thread
From: Marc Zyngier @ 2019-02-20 13:50 UTC (permalink / raw)
To: Vladimir Murzin; +Cc: Russell King, linux-arm-kernel
On Wed, 20 Feb 2019 11:43:06 +0000
Vladimir Murzin <vladimir.murzin@arm.com> wrote:
+ Russell,
> arm64 has got relaxation on GIC version check at early boot stage due
> to update of the GIC architecture let's align ARM with that.
>
> To help backports (even though the code was correct at the time of writing)
> Fixes: e59941b9b3817c9b1dd6662d903150fe3f3c3b0b ("ARM: 8527/1: virt: enable GICv3 system registers")
>
> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
> ---
> arch/arm/kernel/hyp-stub.S | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S
> index 9ef1759..fd0a723 100644
> --- a/arch/arm/kernel/hyp-stub.S
> +++ b/arch/arm/kernel/hyp-stub.S
> @@ -179,8 +179,8 @@ ARM_BE8(orr r7, r7, #(1 << 25)) @ HSCTLR.EE
> @ Check whether GICv3 system registers are available
> mrc p15, 0, r7, c0, c1, 1 @ ID_PFR1
> ubfx r7, r7, #28, #4
> - cmp r7, #1
> - bne 2f
> + teq r7, #0
> + beq 2f
>
> @ Enable system register accesses
> mrc p15, 4, r7, c12, c9, 5 @ ICC_HSRE
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Can you please put this in Russell's patch system?
Thanks,
M.
--
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^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH 2/2] ARM: virt: Align GIC version check with arm64 counterpart
2019-02-20 13:50 ` Marc Zyngier
@ 2019-02-20 14:03 ` Vladimir Murzin
0 siblings, 0 replies; 6+ messages in thread
From: Vladimir Murzin @ 2019-02-20 14:03 UTC (permalink / raw)
To: Marc Zyngier; +Cc: Russell King, linux-arm-kernel
On 2/20/19 1:50 PM, Marc Zyngier wrote:
> On Wed, 20 Feb 2019 11:43:06 +0000
> Vladimir Murzin <vladimir.murzin@arm.com> wrote:
>
> + Russell,
>
>> arm64 has got relaxation on GIC version check at early boot stage due
>> to update of the GIC architecture let's align ARM with that.
>>
>> To help backports (even though the code was correct at the time of writing)
>> Fixes: e59941b9b3817c9b1dd6662d903150fe3f3c3b0b ("ARM: 8527/1: virt: enable GICv3 system registers")
>>
>> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
>> ---
>> arch/arm/kernel/hyp-stub.S | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S
>> index 9ef1759..fd0a723 100644
>> --- a/arch/arm/kernel/hyp-stub.S
>> +++ b/arch/arm/kernel/hyp-stub.S
>> @@ -179,8 +179,8 @@ ARM_BE8(orr r7, r7, #(1 << 25)) @ HSCTLR.EE
>> @ Check whether GICv3 system registers are available
>> mrc p15, 0, r7, c0, c1, 1 @ ID_PFR1
>> ubfx r7, r7, #28, #4
>> - cmp r7, #1
>> - bne 2f
>> + teq r7, #0
>> + beq 2f
>>
>> @ Enable system register accesses
>> mrc p15, 4, r7, c12, c9, 5 @ ICC_HSRE
>
> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
>
> Can you please put this in Russell's patch system?
Patch #8848
Cheers
Vladimir
>
> Thanks,
>
> M.
>
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] arm64: virt: Relax GIC version check
2019-02-20 11:43 [PATCH 1/2] arm64: virt: Relax GIC version check Vladimir Murzin
2019-02-20 11:43 ` [PATCH 2/2] ARM: virt: Align GIC version check with arm64 counterpart Vladimir Murzin
@ 2019-02-20 13:46 ` Marc Zyngier
2019-02-20 14:13 ` Will Deacon
1 sibling, 1 reply; 6+ messages in thread
From: Marc Zyngier @ 2019-02-20 13:46 UTC (permalink / raw)
To: Vladimir Murzin; +Cc: Catalin Marinas, Will Deacon, linux-arm-kernel
+ Will, Catalin
On Wed, 20 Feb 2019 11:43:05 +0000
Vladimir Murzin <vladimir.murzin@arm.com> wrote:
> Updates to the GIC architecture allow ID_AA64PFR0_EL1.GIC to have
> values other than 0 or 1. At the moment, Linux is quite strict in the
> way it handles this field at early boot stage (cpufeature is fine) and
> will refuse to use the system register CPU interface if it doesn't
> find the value 1.
>
> To help backports (even though the code was correct at the time of writing)
> Fixes: 021f653791ad17e03f98aaa7fb933816ae16f161 ("irqchip: gic-v3: Initial support for GICv3")
>
> Reported-by: Chase Conklin <Chase.Conklin@arm.com>
> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
> ---
> arch/arm64/kernel/head.S | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
> index 15d79a8..eecf792 100644
> --- a/arch/arm64/kernel/head.S
> +++ b/arch/arm64/kernel/head.S
> @@ -539,8 +539,7 @@ set_hcr:
> /* GICv3 system register access */
> mrs x0, id_aa64pfr0_el1
> ubfx x0, x0, #24, #4
> - cmp x0, #1
> - b.ne 3f
> + cbz x0, 3f
>
> mrs_s x0, SYS_ICC_SRE_EL2
> orr x0, x0, #ICC_SRE_EL2_SRE // Set ICC_SRE_EL2.SRE==1
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Will, Catalin: It is probably too late for the merge window, but on the
odd chance you could queue it as a fix... Otherwise, this will be a 5.2
candidate.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
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^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH 1/2] arm64: virt: Relax GIC version check
2019-02-20 13:46 ` [PATCH 1/2] arm64: virt: Relax GIC version check Marc Zyngier
@ 2019-02-20 14:13 ` Will Deacon
0 siblings, 0 replies; 6+ messages in thread
From: Will Deacon @ 2019-02-20 14:13 UTC (permalink / raw)
To: Marc Zyngier; +Cc: Catalin Marinas, Vladimir Murzin, linux-arm-kernel
On Wed, Feb 20, 2019 at 01:46:16PM +0000, Marc Zyngier wrote:
> + Will, Catalin
>
> On Wed, 20 Feb 2019 11:43:05 +0000
> Vladimir Murzin <vladimir.murzin@arm.com> wrote:
>
> > Updates to the GIC architecture allow ID_AA64PFR0_EL1.GIC to have
> > values other than 0 or 1. At the moment, Linux is quite strict in the
> > way it handles this field at early boot stage (cpufeature is fine) and
> > will refuse to use the system register CPU interface if it doesn't
> > find the value 1.
> >
> > To help backports (even though the code was correct at the time of writing)
> > Fixes: 021f653791ad17e03f98aaa7fb933816ae16f161 ("irqchip: gic-v3: Initial support for GICv3")
> >
> > Reported-by: Chase Conklin <Chase.Conklin@arm.com>
> > Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
> > ---
> > arch/arm64/kernel/head.S | 3 +--
> > 1 file changed, 1 insertion(+), 2 deletions(-)
> >
> > diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
> > index 15d79a8..eecf792 100644
> > --- a/arch/arm64/kernel/head.S
> > +++ b/arch/arm64/kernel/head.S
> > @@ -539,8 +539,7 @@ set_hcr:
> > /* GICv3 system register access */
> > mrs x0, id_aa64pfr0_el1
> > ubfx x0, x0, #24, #4
> > - cmp x0, #1
> > - b.ne 3f
> > + cbz x0, 3f
> >
> > mrs_s x0, SYS_ICC_SRE_EL2
> > orr x0, x0, #ICC_SRE_EL2_SRE // Set ICC_SRE_EL2.SRE==1
>
> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
>
> Will, Catalin: It is probably too late for the merge window, but on the
> odd chance you could queue it as a fix... Otherwise, this will be a 5.2
> candidate.
Sure, I'll grab it.
Will
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^ permalink raw reply [flat|nested] 6+ messages in thread
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2019-02-20 11:43 [PATCH 1/2] arm64: virt: Relax GIC version check Vladimir Murzin
2019-02-20 11:43 ` [PATCH 2/2] ARM: virt: Align GIC version check with arm64 counterpart Vladimir Murzin
2019-02-20 13:50 ` Marc Zyngier
2019-02-20 14:03 ` Vladimir Murzin
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