From: Leo Yan <leo.yan@linaro.org>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
Christoffer Dall <christoffer.dall@arm.com>,
linux-kernel@vger.kernel.org, Jun Yao <yaojun8558363@gmail.com>,
James Morse <james.morse@arm.com>,
Andre Przywara <andre.przywara@arm.com>,
Paolo Bonzini <pbonzini@redhat.com>,
kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v1 2/4] KVM: arm/arm64: vgic: Improve comment on kvm_vgic_inject_irq
Date: Fri, 22 Feb 2019 16:54:39 +0800 [thread overview]
Message-ID: <20190222085439.GA845@leoy-ThinkPad-X240s> (raw)
In-Reply-To: <20190222083756.359523ca@why.wild-wind.fr.eu.org>
Hi Marc,
On Fri, Feb 22, 2019 at 08:37:56AM +0000, Marc Zyngier wrote:
> On Fri, 22 Feb 2019 16:23:24 +0800
> Leo Yan <leo.yan@linaro.org> wrote:
>
> > The function kvm_vgic_inject_irq() is not only used by PPIs but also can
> > be used to inject interrupt for SPIs; this patch improves comment for
> > argument @cpuid to reflect support SPIs as well.
> >
> > Signed-off-by: Leo Yan <leo.yan@linaro.org>
> > ---
> > virt/kvm/arm/vgic/vgic.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/virt/kvm/arm/vgic/vgic.c b/virt/kvm/arm/vgic/vgic.c
> > index 7cfdfbc910e0..79fe64c15051 100644
> > --- a/virt/kvm/arm/vgic/vgic.c
> > +++ b/virt/kvm/arm/vgic/vgic.c
> > @@ -394,7 +394,7 @@ bool vgic_queue_irq_unlock(struct kvm *kvm, struct vgic_irq *irq,
> > /**
> > * kvm_vgic_inject_irq - Inject an IRQ from a device to the vgic
> > * @kvm: The VM structure pointer
> > - * @cpuid: The CPU for PPIs
> > + * @cpuid: The CPU for PPIs and SPIs
> > * @intid: The INTID to inject a new state to.
> > * @level: Edge-triggered: true: to trigger the interrupt
> > * false: to ignore the call
>
> What does the CPU mean for SPIs? By definition, the routing of an SPI
> is defined by the distributor configuration.
In the code, KVM injects PPIs by specifying CPU id, so that every PPI
is bound to specific target CPU. But for SPIs, it always pass '0' for
cpuid, from my understanding this means VM will set interrupt affinity
to VCPU0 by default; in theory we also can set different cpuid for
SPIs so that the SPIs also can be handled by other secondary VCPUs;
this is why I think @cpuid also can be used by SPIs.
> And what about LPIs? SGIs?
TBH, I don't know LPIs and didn't use it before.
For SGIs, I read the code, it uses different path to handle SGI in KVM
so kvm_vgic_inject_irq() is not used for SGIs.
> I'm afraid you've misunderstood what cpuid is for.
Thanks for guidance.
Thanks,
Leo Yan
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next prev parent reply other threads:[~2019-02-22 8:54 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-22 8:23 [PATCH v1 0/4] ARM64/KVM: Minor cleanup and refactoring Leo Yan
2019-02-22 8:23 ` [PATCH v1 1/4] KVM: arm64: Use macro to replace hard number Leo Yan
2019-02-22 11:40 ` Mark Rutland
2019-02-22 8:23 ` [PATCH v1 2/4] KVM: arm/arm64: vgic: Improve comment on kvm_vgic_inject_irq Leo Yan
2019-02-22 8:37 ` Marc Zyngier
2019-02-22 8:54 ` Leo Yan [this message]
2019-02-22 9:39 ` Marc Zyngier
2019-02-22 12:49 ` Leo Yan
2019-02-22 15:40 ` Marc Zyngier
2019-02-25 0:09 ` Leo Yan
2019-02-22 8:23 ` [PATCH v1 3/4] KVM: arm/arm64: Define TCR_EL2_T0SZ_MASK as TCR_T0SZ_MASK Leo Yan
2019-02-22 11:43 ` Mark Rutland
2019-02-22 8:23 ` [PATCH v1 4/4] KVM: arm/arm64: Fix comment on create_hyp_mappings() Leo Yan
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