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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Sun, 3 Mar 2019 07:12:57 -0000 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps4076.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x237CuQi32702716 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Sun, 3 Mar 2019 07:12:56 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BFB4CA4055; Sun, 3 Mar 2019 07:12:56 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 484ECA4040; Sun, 3 Mar 2019 07:12:55 +0000 (GMT) Received: from rapoport-lnx (unknown [9.148.8.84]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTPS; Sun, 3 Mar 2019 07:12:55 +0000 (GMT) Date: Sun, 3 Mar 2019 09:12:53 +0200 From: Mike Rapoport To: Steven Price Subject: Re: [PATCH v2 03/13] mm: Add generic p?d_large() macros References: <20190221113502.54153-1-steven.price@arm.com> <20190221113502.54153-4-steven.price@arm.com> <20190221142812.oa53lfnnfmsuh6ys@kshutemo-mobl1> <20190221145706.zqwfdoyiirn3lc7y@kshutemo-mobl1> <20190221210618.voyfs5cnafpvgedh@kshutemo-mobl1> <20190301115300.GE5156@rapoport-lnx> <20190301123031.rw3dswcoaa2x7haq@kshutemo-mobl1> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) X-TM-AS-GCONF: 00 x-cbid: 19030307-4275-0000-0000-000003161E33 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19030307-4276-0000-0000-000038246B23 Message-Id: <20190303071253.GA7585@rapoport-lnx> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-03-03_03:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1903030057 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190302_231311_547829_EEAD210B X-CRM114-Status: GOOD ( 32.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Dave Hansen , James Morse , Arnd Bergmann , Ard Biesheuvel , Peter Zijlstra , Catalin Marinas , x86@kernel.org, Will Deacon , linux-kernel@vger.kernel.org, linux-mm@kvack.org, =?iso-8859-1?B?Suly9G1l?= Glisse , Ingo Molnar , Borislav Petkov , Andy Lutomirski , "H. Peter Anvin" , "Kirill A. Shutemov" , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, "Liang, Kan" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Mar 01, 2019 at 01:39:30PM +0000, Steven Price wrote: > On 01/03/2019 12:30, Kirill A. Shutemov wrote: > > On Fri, Mar 01, 2019 at 01:53:01PM +0200, Mike Rapoport wrote: > >> Him Kirill, > >> > >> On Fri, Feb 22, 2019 at 12:06:18AM +0300, Kirill A. Shutemov wrote: > >>> On Thu, Feb 21, 2019 at 05:16:46PM +0000, Steven Price wrote: > >>>>>> Note that in terms of the new page walking code, these new defines are > >>>>>> only used when walking a page table without a VMA (which isn't currently > >>>>>> done), so architectures which don't use p?d_large currently will work > >>>>>> fine with the generic versions. They only need to provide meaningful > >>>>>> definitions when switching to use the walk-without-a-VMA functionality. > >>>>> > >>>>> How other architectures would know that they need to provide the helpers > >>>>> to get walk-without-a-VMA functionality? This looks very fragile to me. > >>>> > >>>> Yes, you've got a good point there. This would apply to the p?d_large > >>>> macros as well - any arch which (inadvertently) uses the generic version > >>>> is likely to be fragile/broken. > >>>> > >>>> I think probably the best option here is to scrap the generic versions > >>>> altogether and simply introduce a ARCH_HAS_PXD_LARGE config option which > >>>> would enable the new functionality to those arches that opt-in. Do you > >>>> think this would be less fragile? > >>> > >>> These helpers are useful beyond pagewalker. > >>> > >>> Can we actually do some grinding and make *all* archs to provide correct > >>> helpers? Yes, it's tedious, but not that bad. > >> > >> Many architectures simply cannot support non-leaf entries at the higher > >> levels. I think letting the use a generic helper actually does make sense. > > > > I disagree. > > > > It's makes sense if the level doesn't exists on the arch. > > This is what patch 24 [1] of the series does - if the level doesn't > exist then appropriate stubs are provided. > > > But if the level exists, it will be less frugile to ask the arch to > > provide the helper. Even if it is dummy always-false. > > The problem (as I see it), is we need a reliable set of p?d_large() > implementations to be able to walk arbitrary page tables. Either the > entire functionality of walking page tables without a VMA has to be an > opt-in per architecture, or we need to mandate that every architecture > provide these implementations. I agree that we need a reliable set of p?d_large(), but I'm still not convinced that every architecture should provide these. Why having generic versions if p?d_large() is more fragile, than e.g. p??__access_permitted() or atomic ops? IMHO, adding those functions/macros for architectures that support large pages and providing defines to avoid override of 'static inline' implementations would be robust enough and will avoid unnecessary stubs in architectures that don't have large pages. > I could provide an asm-generic header to provide a complete set of dummy > implementations for architectures that don't support large pages at all, > but that seems a bit overkill when most architectures only need to > define 2 or 3 implementations (the rest being provided by the > folded-levels automatically). > > Thanks, > > Steve > > [1] > https://lore.kernel.org/lkml/20190227170608.27963-25-steven.price@arm.com/ -- Sincerely yours, Mike. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel