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Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1h5pkL-0007S9-Ft; Mon, 18 Mar 2019 10:43:57 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1h5pkI-0007RS-Be for linux-arm-kernel@lists.infradead.org; Mon, 18 Mar 2019 10:43:55 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D228680D; Mon, 18 Mar 2019 03:43:51 -0700 (PDT) Received: from e107155-lin (e107155-lin.cambridge.arm.com [10.1.196.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 779343F614; Mon, 18 Mar 2019 03:43:49 -0700 (PDT) Date: Mon, 18 Mar 2019 10:43:43 +0000 From: Sudeep Holla To: Benjamin Gaignard Subject: Re: [RESEND PATCH 0/7] Introduce bus domains controller framework Message-ID: <20190318104343.GA15574@e107155-lin> References: <20190318100605.29120-1-benjamin.gaignard@st.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20190318100605.29120-1-benjamin.gaignard@st.com> User-Agent: Mutt/1.9.4 (2018-02-28) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190318_034354_406185_3C442AC7 X-CRM114-Status: GOOD ( 11.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robh@kernel.org, loic.pallardy@st.com, arnd@arndb.de, gregkh@linuxfoundation.org, s.hauer@pengutronix.de, linux-kernel@vger.kernel.org, broonie@kernel.org, linux-imx@nxp.com, benjamin.gaignard@linaro.org, fabio.estevam@nxp.com, shawnguo@kernel.org, kernel@pengutronix.de, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Mar 18, 2019 at 11:05:58AM +0100, Benjamin Gaignard wrote: > Bus domains controllers allow to divided system on chip into multiple domains > that can be used to select by who hardware blocks could be accessed. > A domain could be a cluster of CPUs (or coprocessors), a range of addresses or > a group of hardware blocks. > > Framework architecture is inspirated by pinctrl framework: > - a default configuration could be applied before bind the driver > - configurations could be apllied dynamically by drivers > - device node provides the bus domains configurations > > An example of bus domains controller is STM32 ETZPC hardware block > which got 3 domains: > - secure: hardware blocks are only accessible by software running on trust > zone. > - non-secure: hardware blocks are accessible by non-secure software (i.e. > linux kernel). > - coprocessor: hardware blocks are only accessible by the corpocessor. > Up to 94 hardware blocks of the soc could be managed by ETZPC and > assigned to one of the three domains. > You fail to explain why do we need this in non-secure Linux ? You need to have solid reasons as why this can't be done in secure firmware. And yes I mean even on arm32. On platforms with such hardware capabilities you will need some secure firmware to be running and these things can be done there. I don't want this enabled for ARM64 at all, firmware *has to deal* with this. -- Regards, Sudeep _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel