From: Joseph Lo <josephl@nvidia.com>
To: Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>
Cc: linux-tegra@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Joseph Lo <josephl@nvidia.com>
Subject: [PATCH 1/2] arm64: tegra: Add pinmux for PWM-based DFLL support on Shield platform
Date: Fri, 22 Mar 2019 15:11:10 +0800 [thread overview]
Message-ID: <20190322071111.32432-1-josephl@nvidia.com> (raw)
Add pinmux for PWM-based DFLL support on Shield platform.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
index 88a4b9333d84..c668f16c8574 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
@@ -1318,6 +1318,20 @@
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
};
+
+ dvfs_pwm_active_state: dvfs_pwm_active {
+ dvfs_pwm_pbb1 {
+ nvidia,pins = "dvfs_pwm_pbb1";
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+ };
+
+ dvfs_pwm_inactive_state: dvfs_pwm_inactive {
+ dvfs_pwm_pbb1 {
+ nvidia,pins = "dvfs_pwm_pbb1";
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ };
+ };
};
serial@70006000 {
--
2.21.0
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next reply other threads:[~2019-03-22 7:11 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-22 7:11 Joseph Lo [this message]
2019-03-22 7:11 ` [PATCH 2/2] arm64: tegra: Enable DFLL clock on Shield platform Joseph Lo
2019-03-22 9:52 ` [PATCH 1/2] arm64: tegra: Add pinmux for PWM-based DFLL support " Thierry Reding
2019-04-02 3:06 ` Joseph Lo
2019-04-15 1:27 ` Joseph Lo
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