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From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: alexander.shishkin@linux.intel.com, coresight@lists.linaro.org,
	peterz@infradead.org, Mike.Leach@arm.com, leo.yan@linaro.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 11/16] coresight: tmc-etr: Refactor function tmc_etr_setup_perf_buf()
Date: Tue, 26 Mar 2019 10:29:29 -0600	[thread overview]
Message-ID: <20190326162929.GA25410@xps15> (raw)
In-Reply-To: <216da3b1-217d-4b89-b027-854f49e3b824@arm.com>

On Tue, Mar 26, 2019 at 03:29:03PM +0000, Suzuki K Poulose wrote:
> On 03/25/2019 09:56 PM, Mathieu Poirier wrote:
> > Refactoring function tmc_etr_setup_perf_buf() so that it only deals
> > with the high level etr_perf_buffer, and leaving the allocation of the
> > backend buffer (i.e etr_buf) to another function.
> > 
> > That way the backend buffer allocation function can decide if it wants
> > to reuse an existing buffer (CPU-wide trace scenarios) or simply create
> > a new one.
> > 
> > Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
> 
> Looks good to me, except for one minor nit:
> 
> 
> > ---
> >   .../hwtracing/coresight/coresight-tmc-etr.c   | 46 +++++++++++++------
> >   1 file changed, 31 insertions(+), 15 deletions(-)
> > 
> > diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
> > index 6e2c2aa130d5..79fee9341446 100644
> > --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
> > +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
> > @@ -1159,25 +1159,13 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev)
> >   	return ret;
> >   }
> > -/*
> > - * tmc_etr_setup_perf_buf: Allocate ETR buffer for use by perf.
> > - * The size of the hardware buffer is dependent on the size configured
> > - * via sysfs and the perf ring buffer size. We prefer to allocate the
> > - * largest possible size, scaling down the size by half until it
> > - * reaches a minimum limit (1M), beyond which we give up.
> > - */
> > -static struct etr_perf_buffer *
> > -tmc_etr_setup_perf_buf(struct tmc_drvdata *drvdata, int node, int nr_pages,
> > -		       void **pages, bool snapshot)
> > +static struct etr_buf *
> > +tmc_etr_get_etr_buf(struct tmc_drvdata *drvdata, int node,
> > +		    int nr_pages, void **pages)
> 
> nit: The name tmc_etr_get_etr_buf() sounds too generic and has nothing
> to do with the perf. It would be good to make it explicit that it is for
> perf session.
> 
> May be, tmc_etr_perf_get_etr_buf() ? or may be even, simply
> get_perf_etr_buf().

I don't have a strong preference here, the latter looks fine to me.

> 
> Otherwise,
> 
> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>

Ok

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  reply	other threads:[~2019-03-26 16:30 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-25 21:56 [PATCH v2 00/16] coresight: Add support for CPU-wide trace scenarios Mathieu Poirier
2019-03-25 21:56 ` [PATCH v2 01/16] coresight: pmu: Adding ITRACE property to cs_etm PMU Mathieu Poirier
2019-03-25 21:56 ` [PATCH v2 02/16] coresight: etm4x: Add kernel configuration for CONTEXTID Mathieu Poirier
2019-03-26 11:59   ` Suzuki K Poulose
2019-03-25 21:56 ` [PATCH v2 03/16] coresight: etm4x: Configure tracers to emit timestamps Mathieu Poirier
2019-03-26 11:53   ` Suzuki K Poulose
2019-03-25 21:56 ` [PATCH v2 04/16] coresight: Adding return code to sink::disable() operation Mathieu Poirier
2019-03-26 14:55   ` Suzuki K Poulose
2019-03-25 21:56 ` [PATCH v2 05/16] coresight: Move reference counting inside sink drivers Mathieu Poirier
2019-03-26 15:04   ` Suzuki K Poulose
2019-03-25 21:56 ` [PATCH v2 06/16] coresight: Properly address errors in sink::disable() functions Mathieu Poirier
2019-03-25 21:56 ` [PATCH v2 07/16] coresight: Properly address concurrency in sink::update() functions Mathieu Poirier
2019-03-25 21:56 ` [PATCH v2 08/16] coresight: perf: Clean up function etm_setup_aux() Mathieu Poirier
2019-03-25 21:56 ` [PATCH v2 09/16] coresight: perf: Refactor function free_event_data() Mathieu Poirier
2019-03-26 15:07   ` Suzuki K Poulose
2019-03-25 21:56 ` [PATCH v2 10/16] coresight: Communicate perf event to sink buffer allocation function Mathieu Poirier
2019-03-26 15:12   ` Suzuki K Poulose
2019-03-25 21:56 ` [PATCH v2 11/16] coresight: tmc-etr: Refactor function tmc_etr_setup_perf_buf() Mathieu Poirier
2019-03-26 15:29   ` Suzuki K Poulose
2019-03-26 16:29     ` Mathieu Poirier [this message]
2019-03-25 21:56 ` [PATCH v2 12/16] coresight: tmc-etr: Introduce the notion of process ID to ETR devices Mathieu Poirier
2019-03-26 16:46   ` Suzuki K Poulose
2019-03-26 18:06     ` Mathieu Poirier
2019-03-25 21:56 ` [PATCH v2 13/16] coresight: tmc-etr: Allow events to use the same ETR buffer Mathieu Poirier
2019-03-26 16:18   ` Suzuki K Poulose
2019-03-26 17:55     ` Mathieu Poirier
2019-03-27 11:32       ` Suzuki K Poulose
2019-03-27 17:01         ` Mathieu Poirier
2019-04-01 13:01           ` Suzuki K Poulose
2019-04-03  2:13             ` Mathieu Poirier
2019-03-30 15:43   ` Leo Yan
2019-04-01  7:29     ` Mathieu Poirier
2019-03-25 21:56 ` [PATCH v2 14/16] coresight: tmc-etr: Add support for CPU-wide trace scenarios Mathieu Poirier
2019-03-25 21:56 ` [PATCH v2 15/16] coresight: tmc-etf: " Mathieu Poirier
2019-03-25 21:56 ` [PATCH v2 16/16] coresight: etb10: " Mathieu Poirier
2019-03-27  7:52 ` [PATCH v2 00/16] coresight: " Leo Yan
2019-03-27 14:40   ` Mathieu Poirier
2019-03-27 14:44     ` Leo Yan
2019-04-11 18:52 ` Robert Walker
2019-04-16 19:37   ` Mathieu Poirier
2019-04-24 16:22     ` Robert Walker

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