From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_ADSP_DISCARD,DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9C1EC282DD for ; Mon, 8 Apr 2019 01:31:33 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A8DE7208E3 for ; Mon, 8 Apr 2019 01:31:33 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="AEoN+z7a"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=megous.com header.i=@megous.com header.b="INCFqXG+" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A8DE7208E3 Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=megous.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=fLSXbdhmgz05SH2lFpfiMq0Dru2K6jgGip+oorhtXNM=; b=AEoN+z7aoNbOrP gICVm/Hz1u9IxDFXBWta9gEztKKZsku1KfP07MDxoIr0GnOLjJpzv1YHnDb+6jwrkR6YT4MCYXZjM SX/fWhlCKzVNfYhhKtvRKn3DzydA3aqfS9KZMxTdA4XkCoLPXj1fqEqnQhl0jol/0yO9UnNDx3f8b x6vGm5q4/yr4MzcyRmrD4VITbVY5sSR0KwX+65eB2TYH4CSMTox/mQeb72XMQ7a4Ey8d4JwZSMdIc Wg9DG6RS8EXuM2A7OO6bSEMjtW9esS33xuDhfUfqs+WFkuqyMqZk4zLqkN6Z/jK1ycVGU8IXkx5pu 7WAfPyxsnuZmcJE+WyxQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hDJ8F-00029T-Rd; Mon, 08 Apr 2019 01:31:31 +0000 Received: from vps.xff.cz ([195.181.215.36]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hDJ8B-0001z7-KP for linux-arm-kernel@lists.infradead.org; Mon, 08 Apr 2019 01:31:29 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=megous.com; s=mail; t=1554687084; bh=NXl+t2nMVmJm864zGj/Rwn3yI5gstNPEbnRkBMnxNOI=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=INCFqXG+pVkDfq9KNQ6q9PPzWZPzHl44jzTaFwxv8Ll8NbTywUclqj+63QDQT+T/2 THt8810rUP8LZ8r7EW0CsRrBZpFmFVr1At6HOBVDwm4NmyrMaDcbcO9DsvKyWVmA5B 7tij9SIiid05ohHLv0YI6QVkItV0ojKrraA+ONvc= Date: Mon, 8 Apr 2019 03:31:24 +0200 From: =?utf-8?Q?Ond=C5=99ej?= Jirman To: linux-sunxi@googlegroups.com, Maxime Ripard , Chen-Yu Tsai , Rob Herring , Linus Walleij Subject: Re: [PATCH 10/12] pinctrl: sunxi: Support I/O bias voltage setting on H6 Message-ID: <20190408013124.y7rvhmmwsqw3i2mz@core.my.home> Mail-Followup-To: linux-sunxi@googlegroups.com, Maxime Ripard , Chen-Yu Tsai , Rob Herring , Linus Walleij , Mark Rutland , David Airlie , Chi-Hsien Lin , dri-devel@lists.freedesktop.org, linux-stm32@st-md-mailman.stormreply.com, brcm80211-dev-list@cypress.com, Jose Abreu , Naveen Gupta , devicetree@vger.kernel.org, Arend van Spriel , Alexandre Torgue , Hante Meuleman , linux-gpio@vger.kernel.org, Wright Feng , Giuseppe Cavallaro , linux-arm-kernel@lists.infradead.org, Franky Lin , Maxime Coquelin , brcm80211-dev-list.pdl@broadcom.com, netdev@vger.kernel.org, linux-wireless@vger.kernel.org, linux-kernel@vger.kernel.org, Kalle Valo , Daniel Vetter , "David S. Miller" References: <20190405234514.6183-1-megous@megous.com> <20190405234514.6183-11-megous@megous.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20190405234514.6183-11-megous@megous.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190407_183128_174019_8EA1CF11 X-CRM114-Status: GOOD ( 19.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Daniel Vetter , David Airlie , Chi-Hsien Lin , dri-devel@lists.freedesktop.org, brcm80211-dev-list@cypress.com, linux-stm32@st-md-mailman.stormreply.com, Jose Abreu , Naveen Gupta , devicetree@vger.kernel.org, Arend van Spriel , Alexandre Torgue , Hante Meuleman , linux-gpio@vger.kernel.org, Wright Feng , Giuseppe Cavallaro , linux-arm-kernel@lists.infradead.org, Franky Lin , brcm80211-dev-list.pdl@broadcom.com, netdev@vger.kernel.org, linux-wireless@vger.kernel.org, linux-kernel@vger.kernel.org, Kalle Valo , Maxime Coquelin , "David S. Miller" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sat, Apr 06, 2019 at 01:45:12AM +0200, verejna wrote: > From: Ondrej Jirman > > H6 SoC has a "pio group withstand voltage mode" register (datasheet > description), that needs to be used to select either 1.8V or 3.3V > I/O mode, based on what voltage is powering the respective pin > banks and is thus used for I/O signals. > > Add support for configuring this register according to the voltage > of the pin bank regulator (if enabled). > > This is similar to the support for I/O bias voltage setting patch > for A80 and the same concerns apply. (see commit 402bfb3c135213dc > Support I/O bias voltage setting on A80). > > Signed-off-by: Ondrej Jirman > --- > drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c | 1 + > drivers/pinctrl/sunxi/pinctrl-sunxi.c | 14 ++++++++++++++ > drivers/pinctrl/sunxi/pinctrl-sunxi.h | 3 +++ > 3 files changed, 18 insertions(+) > > diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c > index ef4268cc6227..30b1befa8ed8 100644 > --- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c > +++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c > @@ -591,6 +591,7 @@ static const struct sunxi_pinctrl_desc h6_pinctrl_data = { > .irq_banks = 4, > .irq_bank_map = h6_irq_bank_map, > .irq_read_needs_mux = true, > + .io_bias_cfg_variant = IO_BIAS_CFG_V2, > }; > > static int h6_pinctrl_probe(struct platform_device *pdev) > diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c > index 9f329fec77cf..59a4ed396d92 100644 > --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c > +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c > @@ -607,6 +607,8 @@ static int sunxi_pinctrl_set_io_bias_cfg(struct sunxi_pinctrl *pctl, > unsigned pin, > struct regulator *supply) > { > + unsigned short bank = pin / PINS_PER_BANK; > + unsigned long flags; > u32 val, reg; > int uV; > > @@ -639,6 +641,18 @@ static int sunxi_pinctrl_set_io_bias_cfg(struct sunxi_pinctrl *pctl, > reg = readl(pctl->membase + sunxi_grp_config_reg(pin)); > reg &= ~IO_BIAS_MASK; > writel(reg | val, pctl->membase + sunxi_grp_config_reg(pin)); > + } else if (pctl->desc->io_bias_cfg_variant == IO_BIAS_CFG_V2) { > + val = uV <= 1800000 ? 1 : 0; > + > + dev_info(pctl->dev, > + "Setting voltage bias to %sV on bank P%c\n", > + val ? "1.8" : "3.3", 'A' + bank); I'll drop this logging in v2. I forgot it here, after testing the patch. o. > + raw_spin_lock_irqsave(&pctl->lock, flags); > + reg = readl(pctl->membase + PIO_POW_MOD_SEL_REG); > + reg &= ~(1 << bank); > + writel(reg | val << bank, pctl->membase + PIO_POW_MOD_SEL_REG); > + raw_spin_unlock_irqrestore(&pctl->lock, flags); > } > > return 0; > diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h > index 476772f91dba..3a66376f141b 100644 > --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h > +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h > @@ -95,7 +95,10 @@ > #define PINCTRL_SUN7I_A20 BIT(7) > #define PINCTRL_SUN8I_R40 BIT(8) > > +#define PIO_POW_MOD_SEL_REG 0x340 > + > #define IO_BIAS_CFG_V1 1 > +#define IO_BIAS_CFG_V2 2 > > struct sunxi_desc_function { > unsigned long variant; > -- > 2.21.0 > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel