From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.5 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS, USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5DD93C10F14 for ; Tue, 23 Apr 2019 13:21:46 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2B01520645 for ; Tue, 23 Apr 2019 13:21:46 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="YaDVZfXR" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2B01520645 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ANwRl0Ui22ZsIzNA9duGzpjaWbqHZw2HsHgnLM8pqxs=; b=YaDVZfXRUlB/KF OYoQnm/hza8LQ2VG6aWGpyge7CXeQMWtqm+WhyXX9L2Xs+Og2ccOMmNDzfuQH/ETWEeBwHQ8RAy6e usNUQ3Q37MMScQuBOmq0DFCL6l7xJUOcl4Knn0X1NQV4SNCRbKMVHiPuo2rSZ6nWwhblgMomD1qA3 uen6rVUSMRqiMd2ZQN6lF2bJuxIciMqz/MWXcmRqUYzCm5wiG/P8/H0W46Fu0ZPpte3eaaeQ4EwVj bebjhpHgsy0oMVIap4Q4cPusHjGnOVL0bS9ouBpT6lBqeoIU+XTDu04C65TiZXE74f6q1wf9G7R+6 3wlqTr0knmVHMbq8NYYg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hIvMi-0006hy-9r; Tue, 23 Apr 2019 13:21:40 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hIvMf-0006ha-5h for linux-arm-kernel@lists.infradead.org; Tue, 23 Apr 2019 13:21:38 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 48257A78; Tue, 23 Apr 2019 06:21:36 -0700 (PDT) Received: from e107155-lin (e107155-lin.cambridge.arm.com [10.1.196.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A23E13F706; Tue, 23 Apr 2019 06:21:33 -0700 (PDT) Date: Tue, 23 Apr 2019 14:21:26 +0100 From: Sudeep Holla To: Benjamin Gaignard Subject: Re: [RESEND PATCH 0/7] Introduce bus domains controller framework Message-ID: <20190423132116.GA3892@e107155-lin> References: <20190318100605.29120-1-benjamin.gaignard@st.com> <20190318104343.GA15574@e107155-lin> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190423_062137_220244_43253164 X-CRM114-Status: GOOD ( 16.77 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Herring , Benjamin Gaignard , Arnd Bergmann , Greg Kroah-Hartman , s.hauer@pengutronix.de, Linux Kernel Mailing List , Mark Brown , linux-imx@nxp.com, kernel@pengutronix.de, Sudeep Holla , Fabio Estevam , Loic PALLARDY , Shawn Guo , Linux ARM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Mar 18, 2019 at 12:05:54PM +0100, Benjamin Gaignard wrote: > Le lun. 18 mars 2019 =E0 11:43, Sudeep Holla a =E9= crit : > > > > On Mon, Mar 18, 2019 at 11:05:58AM +0100, Benjamin Gaignard wrote: > > > Bus domains controllers allow to divided system on chip into multiple= domains > > > that can be used to select by who hardware blocks could be accessed. > > > A domain could be a cluster of CPUs (or coprocessors), a range of add= resses or > > > a group of hardware blocks. > > > > > > Framework architecture is inspirated by pinctrl framework: > > > - a default configuration could be applied before bind the driver > > > - configurations could be apllied dynamically by drivers > > > - device node provides the bus domains configurations > > > > > > An example of bus domains controller is STM32 ETZPC hardware block > > > which got 3 domains: > > > - secure: hardware blocks are only accessible by software running on = trust > > > zone. > > > - non-secure: hardware blocks are accessible by non-secure software (= i.e. > > > linux kernel). > > > - coprocessor: hardware blocks are only accessible by the corpocessor. > > > Up to 94 hardware blocks of the soc could be managed by ETZPC and > > > assigned to one of the three domains. > > > > > > > You fail to explain why do we need this in non-secure Linux ? > > You need to have solid reasons as why this can't be done in secure > > firmware. And yes I mean even on arm32. On platforms with such hardware > > capabilities you will need some secure firmware to be running and these > > things can be done there. I don't want this enabled for ARM64 at all, > > firmware *has to deal* with this. > > We use ETZPC to define if hardware blocks can be used by Cortex A7 or Cor= tex > M4 (both non-secure) on STM32MP1 SoC, this new framework allow to change > hardware block split at runtime. This could be done even on non-secure wo= rld > because their is nothing critical to change hardware blocks users. OK, that's interesting, assuming Cortex M4 execution as non-secure. I would expect otherwise. Even if it's configurable, I would see that happen in secure entity via OPTEE or something similar from non-secure side. Do you have any documents that I can refer to get the overall security design for such platforms ? -- Regards, Sudeep _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel