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Received: from j217100.upc-j.chello.nl ([24.132.217.100] helo=hirez.programming.kicks-ass.net) by merlin.infradead.org with esmtpsa (Exim 4.90_1 #2 (Red Hat Linux)) id 1hJZon-0001Fs-Me; Thu, 25 Apr 2019 08:33:21 +0000 Received: by hirez.programming.kicks-ass.net (Postfix, from userid 1000) id 3B75B203E8871; Thu, 25 Apr 2019 10:33:20 +0200 (CEST) Date: Thu, 25 Apr 2019 10:33:20 +0200 From: Peter Zijlstra To: Raphael Gault Subject: Re: [RFC 3/6] objtool: arm64: Adapt the stack frame checks and the section analysis for the arm architecture Message-ID: <20190425083320.GK4038@hirez.programming.kicks-ass.net> References: <20190409135243.12424-1-raphael.gault@arm.com> <20190409135243.12424-4-raphael.gault@arm.com> <20190423203627.mwnaknit7cvr3l5l@treble> <20190424165640.5yeg2yicl7ej7g3i@treble> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Julien Thierry , Catalin Marinas , Will Deacon , "linux-kernel@vger.kernel.org" , Josh Poimboeuf , "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Apr 25, 2019 at 08:12:24AM +0000, Raphael Gault wrote: > The motivation behind this is that the `br ` instruction is a > dynamic jump (jump to the address contained in the provided register). > This instruction is used for sibling calls but can also be used for > switch table. I use this to differentiate these two cases from one another: > > Generally the `adr/adrp` instruction is used prior to `br` in order to > load the address into the register. What I do here is go back throught > the instructions and try to identify if the address loaded. Yikes, be very careful with simply going back on the instruction stream. The problem case would be something like: adr ... b 1f ... b ... 1: br ... In that case, simply going backwards from 1 will not yield the desired result. At some point I did a pass storing all the fwd jumps in their destination and used that to 'rewind' the instruction stream, but that wasn't very pretty either. The best way might be to, while doing validate_branch() keep a state table of all most recent ADR(P) instructions and when encountering BR check that state to see what it really is. We currently don't do dynamic insn->type, but it shouldn't be too hard (famous last words of course). _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel