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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id s124sm10994590oia.24.2019.04.26.14.15.40 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 26 Apr 2019 14:15:41 -0700 (PDT) Date: Fri, 26 Apr 2019 16:15:40 -0500 From: Rob Herring To: Yangtao Li Subject: Re: [PATCH v3 2/2] dt-bindings: cpufreq: Document allwinner,cpu-operating-points-v2 Message-ID: <20190426211540.GA890@bogus> References: <20190410174139.20012-1-tiny.windzz@gmail.com> <20190410174139.20012-3-tiny.windzz@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20190410174139.20012-3-tiny.windzz@gmail.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190426_141548_001115_7710933C X-CRM114-Status: GOOD ( 13.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: nm@ti.com, mark.rutland@arm.com, linux-pm@vger.kernel.org, maxime.ripard@bootlin.com, vireshk@kernel.org, rjw@rjwysocki.net, linux-kernel@vger.kernel.org, sboyd@kernel.org, wens@csie.org, linux-arm-kernel@lists.infradead.org, gregkh@linuxfoundation.org, mchehab+samsung@kernel.org, davem@davemloft.net, devicetree@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Apr 10, 2019 at 01:41:39PM -0400, Yangtao Li wrote: > Allwinner Process Voltage Scaling Tables defines the voltage and > frequency value based on the speedbin blown in the efuse combination. > The sunxi-cpufreq-nvmem driver reads the efuse value from the SoC to > provide the OPP framework with required information. > This is used to determine the voltage and frequency value for each > OPP of operating-points-v2 table when it is parsed by the OPP framework. > > The "allwinner,cpu-operating-points-v2" DT extends the "operating-points-v2" > with following parameters: > - nvmem-cells (NVMEM area containig the speedbin information) > - opp-microvolt-: voltage in micro Volts. > At runtime, the platform can pick a and matching > opp-microvolt- property. > HW: : > sun50iw-h6 speed0 speed1 speed2 We already have at least one way to support speed bins with QC kryo binding. Why do we need a different way? > > Signed-off-by: Yangtao Li > --- > .../bindings/opp/sunxi-nvmem-cpufreq.txt | 168 ++++++++++++++++++ > 1 file changed, 168 insertions(+) > create mode 100644 Documentation/devicetree/bindings/opp/sunxi-nvmem-cpufreq.txt _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel