From: Sudeep Holla <sudeep.holla@arm.com>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>,
john.garry@huawei.com, Will Deacon <will.deacon@arm.com>,
Jeremy Linton <jeremy.linton@arm.com>,
Shaokun Zhang <zhangshaokun@hisilicon.com>,
qiuzhenfa@hisilicon.com, guohanjun@huawei.com,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/2] arm64: cacheinfo: Update cache_line_size detected from PPTT
Date: Mon, 29 Apr 2019 12:12:10 +0100 [thread overview]
Message-ID: <20190429111210.GB23929@e107155-lin> (raw)
In-Reply-To: <20190427161243.6674yszyflgjqbhc@mbp>
On Sat, Apr 27, 2019 at 05:12:44PM +0100, Catalin Marinas wrote:
> On Fri, Apr 26, 2019 at 12:18:33PM -0500, Jeremy Linton wrote:
> > On 4/25/19 8:40 PM, Shaokun Zhang wrote:
> > > cache_line_size is derived from CTR_EL0.CWG field and is called mostly
> > > for I/O device drivers. For HiSilicon certain plantform, like the
> >
> > But there are core users too? Thinkgs like blk-mq, the trace ring buffer,
> > iommu/iova, slub/slab.
>
> cache_line_size() is indeed used in the core parts of the kernel, for
> example when passing SLAB_HWCACHE_ALIGN on kmem_cache creation. Its
> meaning is performance rather than coherency as we use ARCH_DMA_MINALIGN
> for the latter.
>
> > And a quick look seems to indicate a number of those
> > users are going to be checking the cache line size before the cachinfo is
> > populated (it happens fairly late via device_initcall() and a hp notifier).
> > Is it going to be a problem if the value changes?
>
> That's a good point. At a quick look I didn't see anything that would be
> affected by a non-constant cache_line_size().
>
Ah, that's good. But won't it still affect early boot allocations(if the
smaller init time value is used before cacheinfo is populated) ? Sorry,
I haven't looked at all the uses of cache_line_size().
But if cache_line_size() takes care of reading updated value and impact on
boot time allocations are minimal, then this solution should be fine.
--
Regards,
Sudeep
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next prev parent reply other threads:[~2019-04-29 11:12 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-26 1:40 [PATCH 1/2] ACPI/PPTT: Add variable to record max cache line size Shaokun Zhang
2019-04-26 1:40 ` [PATCH 2/2] arm64: cacheinfo: Update cache_line_size detected from PPTT Shaokun Zhang
2019-04-26 17:18 ` Jeremy Linton
2019-04-27 16:12 ` Catalin Marinas
2019-04-29 11:12 ` Sudeep Holla [this message]
2019-04-29 11:06 ` Sudeep Holla
2019-04-27 16:16 ` Catalin Marinas
2019-04-30 1:32 ` Zhangshaokun
2019-04-26 17:02 ` [PATCH 1/2] ACPI/PPTT: Add variable to record max cache line size Jeremy Linton
2019-04-29 11:26 ` Sudeep Holla
2019-04-30 2:19 ` Zhangshaokun
2019-04-30 2:13 ` Zhangshaokun
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