From: Sasha Levin <sashal@kernel.org>
To: Sasha Levin <sashal@kernel.org>
To: Will Deacon <will.deacon@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: , Marc Zyngier <marc.zyngier@arm.com>,
Will Deacon <will.deacon@arm.com>,
stable@vger.kernel.org, tglx@linutronix.de,
Vincenzo Frascino <vincenzo.frascino@arm.com>
Subject: Re: [PATCH] arm64: arch_timer: Ensure counter register reads occur with seqlock held
Date: Tue, 30 Apr 2019 10:32:03 +0000 [thread overview]
Message-ID: <20190430103204.2E91D21743@mail.kernel.org> (raw)
In-Reply-To: <20190429165912.9497-1-will.deacon@arm.com>
Hi,
[This is an automated email]
This commit has been processed because it contains a -stable tag.
The stable tag indicates that it's relevant for the following trees: all
The bot has tested the following trees: v5.0.10, v4.19.37, v4.14.114, v4.9.171, v4.4.179, v3.18.139.
v5.0.10: Build OK!
v4.19.37: Build OK!
v4.14.114: Failed to apply! Possible dependencies:
f2e600c149fd ("arm64: Implement arch_counter_get_cntpct to read the physical counter")
v4.9.171: Failed to apply! Possible dependencies:
16d10ef29f25 ("clocksource/drivers/arm_arch_timer: Introduce generic errata handling infrastructure")
bb42ca474010 ("clocksource/drivers/arm_arch_timer: Work around Hisilicon erratum 161010101")
d003d029cea8 ("arm64: arch_timer: Add HISILICON_ERRATUM_161010101 ACPI matching data")
f2e600c149fd ("arm64: Implement arch_counter_get_cntpct to read the physical counter")
fa8d815fac96 ("arm64: arch_timer: Workaround for Cortex-A73 erratum 858921")
v4.4.179: Failed to apply! Possible dependencies:
0cb0786bac15 ("ARM64: PCI: Support ACPI-based PCI host controller")
16d10ef29f25 ("clocksource/drivers/arm_arch_timer: Introduce generic errata handling infrastructure")
1a4f93f7112f ("PCI: Factor DT-specific pci_bus_find_domain_nr() code out")
1bd37a6835be ("iommu/arm-smmu: Workaround for ThunderX erratum #27704")
1d8f51d41fc7 ("arm/arm64: arch_timer: Use archdata to indicate vdso suitability")
21266be9ed54 ("arch: consolidate CONFIG_STRICT_DEVM in lib/Kconfig.debug")
2ab51ddeca2f ("ARM64: PCI: Add acpi_pci_bus_find_domain_nr()")
46fd5c6b3059 ("clocksource/drivers/arm_arch_timer: Control the evtstrm via the cmdline")
4e3e9b6997b2 ("iommu/arm-smmu: Add support for 16 bit VMID")
75df1386557c ("iommu/arm-smmu: Invalidate TLBs properly")
9c7cb891ecfe ("PCI: Refactor pci_bus_assign_domain_nr() for CONFIG_PCI_DOMAINS_GENERIC")
cd5f22d7967f ("arm64: arch_timer: simplify accessors")
f2e600c149fd ("arm64: Implement arch_counter_get_cntpct to read the physical counter")
f6dc1576cd51 ("arm64: arch_timer: Work around QorIQ Erratum A-008585")
v3.18.139: Failed to apply! Possible dependencies:
04597a65c5ef ("arm64: Track system support for mixed endian EL0")
104a0c02e8b1 ("arm64: Add workaround for Cavium erratum 27456")
16d10ef29f25 ("clocksource/drivers/arm_arch_timer: Introduce generic errata handling infrastructure")
1b907f46db07 ("arm64: kconfig: move emulation option under kernel features")
1bd37a6835be ("iommu/arm-smmu: Workaround for ThunderX erratum #27704")
2d888f48e056 ("arm64: Emulate SETEND for AArch32 tasks")
338d4f49d6f7 ("arm64: kernel: Add support for Privileged Access Never")
359b706473b4 ("arm64: Extract feature parsing code from cpu_errata.c")
587064b610c7 ("arm64: Add framework for legacy instruction emulation")
6d4e11c5e2e8 ("irqchip/gicv3: Workaround for Cavium ThunderX erratum 23154")
736d474f0faf ("arm64: Consolidate hotplug notifier for instruction emulation")
870828e57b14 ("arm64: kernel: Move config_sctlr_el1")
94a9e04aa16a ("arm64: alternative: Introduce feature for GICv3 CPU interface")
9b79f52d1a70 ("arm64: Add support for hooks to handle undefined instructions")
9cb9c9e5ba84 ("arm64: Documentation: add list of software workarounds for errata")
bd35a4adc413 ("arm64: Port SWP/SWPB emulation support from arm")
c739dc83a0b6 ("arm64: lse: rename ARM64_CPU_FEAT_LSE_ATOMICS for consistency")
c852f3205846 ("arm64: Emulate CP15 Barrier instructions")
c9453a3ab1a3 ("arm64: alternatives: fix pr_fmt string for consistency")
f2e600c149fd ("arm64: Implement arch_counter_get_cntpct to read the physical counter")
f6dc1576cd51 ("arm64: arch_timer: Work around QorIQ Erratum A-008585")
How should we proceed with this patch?
--
Thanks,
Sasha
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prev parent reply other threads:[~2019-04-30 10:32 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-29 16:59 [PATCH] arm64: arch_timer: Ensure counter register reads occur with seqlock held Will Deacon
2019-04-30 9:42 ` Vincenzo Frascino
2019-04-30 10:32 ` Sasha Levin [this message]
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