* [PATCH] KVM: arm64: fix ptrauth ID register masking logic
@ 2019-05-01 16:10 Kristina Martsenko
2019-05-01 16:16 ` Will Deacon
2019-05-01 16:20 ` Marc Zyngier
0 siblings, 2 replies; 5+ messages in thread
From: Kristina Martsenko @ 2019-05-01 16:10 UTC (permalink / raw)
To: Marc Zyngier, Christoffer Dall
Cc: Mark Rutland, Julien Thierry, Catalin Marinas, Suzuki K Poulose,
Will Deacon, kvmarm, James Morse, Amit Kachhap, Andrew Murray,
Dave P Martin, linux-arm-kernel
When a VCPU doesn't have pointer auth, we want to hide all four pointer
auth ID register fields from the guest, not just one of them.
Fixes: 384b40caa8af ("KVM: arm/arm64: Context-switch ptrauth registers")
Reported-by: Andrew Murray <andrew.murray@arm.com>
Fsck-up-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com>
---
arch/arm64/kvm/sys_regs.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 9d02643bc601..857b226bcdde 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -1088,10 +1088,10 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu,
if (id == SYS_ID_AA64PFR0_EL1 && !vcpu_has_sve(vcpu)) {
val &= ~(0xfUL << ID_AA64PFR0_SVE_SHIFT);
} else if (id == SYS_ID_AA64ISAR1_EL1 && !vcpu_has_ptrauth(vcpu)) {
- val &= ~(0xfUL << ID_AA64ISAR1_APA_SHIFT) |
- (0xfUL << ID_AA64ISAR1_API_SHIFT) |
- (0xfUL << ID_AA64ISAR1_GPA_SHIFT) |
- (0xfUL << ID_AA64ISAR1_GPI_SHIFT);
+ val &= ~((0xfUL << ID_AA64ISAR1_APA_SHIFT) |
+ (0xfUL << ID_AA64ISAR1_API_SHIFT) |
+ (0xfUL << ID_AA64ISAR1_GPA_SHIFT) |
+ (0xfUL << ID_AA64ISAR1_GPI_SHIFT));
}
return val;
--
2.11.0
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^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH] KVM: arm64: fix ptrauth ID register masking logic
2019-05-01 16:10 [PATCH] KVM: arm64: fix ptrauth ID register masking logic Kristina Martsenko
@ 2019-05-01 16:16 ` Will Deacon
2019-05-01 16:20 ` Andrew Murray
2019-05-01 16:20 ` Marc Zyngier
1 sibling, 1 reply; 5+ messages in thread
From: Will Deacon @ 2019-05-01 16:16 UTC (permalink / raw)
To: Kristina Martsenko
Cc: Mark Rutland, Julien Thierry, Marc Zyngier, Catalin Marinas,
Suzuki K Poulose, Christoffer Dall, kvmarm, James Morse,
Amit Kachhap, Andrew Murray, Dave P Martin, linux-arm-kernel
On Wed, May 01, 2019 at 05:10:08PM +0100, Kristina Martsenko wrote:
> When a VCPU doesn't have pointer auth, we want to hide all four pointer
> auth ID register fields from the guest, not just one of them.
>
> Fixes: 384b40caa8af ("KVM: arm/arm64: Context-switch ptrauth registers")
> Reported-by: Andrew Murray <andrew.murray@arm.com>
> Fsck-up-by: Marc Zyngier <marc.zyngier@arm.com>
Past tense is "fscked" ;)
With that:
Acked-by: Will Deacon <will.deacon@arm.com>
Will
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index 9d02643bc601..857b226bcdde 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -1088,10 +1088,10 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu,
> if (id == SYS_ID_AA64PFR0_EL1 && !vcpu_has_sve(vcpu)) {
> val &= ~(0xfUL << ID_AA64PFR0_SVE_SHIFT);
> } else if (id == SYS_ID_AA64ISAR1_EL1 && !vcpu_has_ptrauth(vcpu)) {
> - val &= ~(0xfUL << ID_AA64ISAR1_APA_SHIFT) |
> - (0xfUL << ID_AA64ISAR1_API_SHIFT) |
> - (0xfUL << ID_AA64ISAR1_GPA_SHIFT) |
> - (0xfUL << ID_AA64ISAR1_GPI_SHIFT);
> + val &= ~((0xfUL << ID_AA64ISAR1_APA_SHIFT) |
> + (0xfUL << ID_AA64ISAR1_API_SHIFT) |
> + (0xfUL << ID_AA64ISAR1_GPA_SHIFT) |
> + (0xfUL << ID_AA64ISAR1_GPI_SHIFT));
> }
>
> return val;
> --
> 2.11.0
>
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^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH] KVM: arm64: fix ptrauth ID register masking logic
2019-05-01 16:16 ` Will Deacon
@ 2019-05-01 16:20 ` Andrew Murray
0 siblings, 0 replies; 5+ messages in thread
From: Andrew Murray @ 2019-05-01 16:20 UTC (permalink / raw)
To: Will Deacon
Cc: Mark Rutland, Julien Thierry, Marc Zyngier, Catalin Marinas,
Suzuki K Poulose, Christoffer Dall, Kristina Martsenko, kvmarm,
James Morse, Amit Kachhap, Dave P Martin, linux-arm-kernel
On Wed, May 01, 2019 at 05:16:57PM +0100, Will Deacon wrote:
> On Wed, May 01, 2019 at 05:10:08PM +0100, Kristina Martsenko wrote:
> > When a VCPU doesn't have pointer auth, we want to hide all four pointer
> > auth ID register fields from the guest, not just one of them.
> >
> > Fixes: 384b40caa8af ("KVM: arm/arm64: Context-switch ptrauth registers")
> > Reported-by: Andrew Murray <andrew.murray@arm.com>
> > Fsck-up-by: Marc Zyngier <marc.zyngier@arm.com>
>
> Past tense is "fscked" ;)
>
> With that:
>
> Acked-by: Will Deacon <will.deacon@arm.com>
>
> Will
This fixes the issue for me.
Tested-by: Andrew Murray <andrew.murray@arm.com>
Thanks,
Andrew Murray
>
> > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> > index 9d02643bc601..857b226bcdde 100644
> > --- a/arch/arm64/kvm/sys_regs.c
> > +++ b/arch/arm64/kvm/sys_regs.c
> > @@ -1088,10 +1088,10 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu,
> > if (id == SYS_ID_AA64PFR0_EL1 && !vcpu_has_sve(vcpu)) {
> > val &= ~(0xfUL << ID_AA64PFR0_SVE_SHIFT);
> > } else if (id == SYS_ID_AA64ISAR1_EL1 && !vcpu_has_ptrauth(vcpu)) {
> > - val &= ~(0xfUL << ID_AA64ISAR1_APA_SHIFT) |
> > - (0xfUL << ID_AA64ISAR1_API_SHIFT) |
> > - (0xfUL << ID_AA64ISAR1_GPA_SHIFT) |
> > - (0xfUL << ID_AA64ISAR1_GPI_SHIFT);
> > + val &= ~((0xfUL << ID_AA64ISAR1_APA_SHIFT) |
> > + (0xfUL << ID_AA64ISAR1_API_SHIFT) |
> > + (0xfUL << ID_AA64ISAR1_GPA_SHIFT) |
> > + (0xfUL << ID_AA64ISAR1_GPI_SHIFT));
> > }
> >
> > return val;
> > --
> > 2.11.0
> >
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] KVM: arm64: fix ptrauth ID register masking logic
2019-05-01 16:10 [PATCH] KVM: arm64: fix ptrauth ID register masking logic Kristina Martsenko
2019-05-01 16:16 ` Will Deacon
@ 2019-05-01 16:20 ` Marc Zyngier
2019-05-02 8:53 ` Dave Martin
1 sibling, 1 reply; 5+ messages in thread
From: Marc Zyngier @ 2019-05-01 16:20 UTC (permalink / raw)
To: Kristina Martsenko, Christoffer Dall
Cc: Mark Rutland, Julien Thierry, Catalin Marinas, Suzuki K Poulose,
Will Deacon, kvmarm, James Morse, Amit Kachhap, Andrew Murray,
Dave P Martin, linux-arm-kernel
On 01/05/2019 17:10, Kristina Martsenko wrote:
> When a VCPU doesn't have pointer auth, we want to hide all four pointer
> auth ID register fields from the guest, not just one of them.
>
> Fixes: 384b40caa8af ("KVM: arm/arm64: Context-switch ptrauth registers")
> Reported-by: Andrew Murray <andrew.murray@arm.com>
> Fsck-up-by: Marc Zyngier <marc.zyngier@arm.com>
> Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com>
> ---
> arch/arm64/kvm/sys_regs.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index 9d02643bc601..857b226bcdde 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -1088,10 +1088,10 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu,
> if (id == SYS_ID_AA64PFR0_EL1 && !vcpu_has_sve(vcpu)) {
> val &= ~(0xfUL << ID_AA64PFR0_SVE_SHIFT);
> } else if (id == SYS_ID_AA64ISAR1_EL1 && !vcpu_has_ptrauth(vcpu)) {
> - val &= ~(0xfUL << ID_AA64ISAR1_APA_SHIFT) |
> - (0xfUL << ID_AA64ISAR1_API_SHIFT) |
> - (0xfUL << ID_AA64ISAR1_GPA_SHIFT) |
> - (0xfUL << ID_AA64ISAR1_GPI_SHIFT);
> + val &= ~((0xfUL << ID_AA64ISAR1_APA_SHIFT) |
> + (0xfUL << ID_AA64ISAR1_API_SHIFT) |
> + (0xfUL << ID_AA64ISAR1_GPA_SHIFT) |
> + (0xfUL << ID_AA64ISAR1_GPI_SHIFT));
> }
>
> return val;
>
Applied and pushed to -next. Thanks Andrew for reporting it, and
Kristina for putting me right!
M.
--
Jazz is not dead. It just smells funny...
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^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH] KVM: arm64: fix ptrauth ID register masking logic
2019-05-01 16:20 ` Marc Zyngier
@ 2019-05-02 8:53 ` Dave Martin
0 siblings, 0 replies; 5+ messages in thread
From: Dave Martin @ 2019-05-02 8:53 UTC (permalink / raw)
To: Marc Zyngier
Cc: Catalin Marinas, Will Deacon, Christoffer Dall,
Kristina Martsenko, Amit Kachhap, kvmarm, linux-arm-kernel
On Wed, May 01, 2019 at 05:20:49PM +0100, Marc Zyngier wrote:
> On 01/05/2019 17:10, Kristina Martsenko wrote:
> > When a VCPU doesn't have pointer auth, we want to hide all four pointer
> > auth ID register fields from the guest, not just one of them.
> >
> > Fixes: 384b40caa8af ("KVM: arm/arm64: Context-switch ptrauth registers")
> > Reported-by: Andrew Murray <andrew.murray@arm.com>
> > Fsck-up-by: Marc Zyngier <marc.zyngier@arm.com>
> > Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com>
> > ---
> > arch/arm64/kvm/sys_regs.c | 8 ++++----
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> > index 9d02643bc601..857b226bcdde 100644
> > --- a/arch/arm64/kvm/sys_regs.c
> > +++ b/arch/arm64/kvm/sys_regs.c
> > @@ -1088,10 +1088,10 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu,
> > if (id == SYS_ID_AA64PFR0_EL1 && !vcpu_has_sve(vcpu)) {
> > val &= ~(0xfUL << ID_AA64PFR0_SVE_SHIFT);
> > } else if (id == SYS_ID_AA64ISAR1_EL1 && !vcpu_has_ptrauth(vcpu)) {
> > - val &= ~(0xfUL << ID_AA64ISAR1_APA_SHIFT) |
> > - (0xfUL << ID_AA64ISAR1_API_SHIFT) |
> > - (0xfUL << ID_AA64ISAR1_GPA_SHIFT) |
> > - (0xfUL << ID_AA64ISAR1_GPI_SHIFT);
> > + val &= ~((0xfUL << ID_AA64ISAR1_APA_SHIFT) |
> > + (0xfUL << ID_AA64ISAR1_API_SHIFT) |
> > + (0xfUL << ID_AA64ISAR1_GPA_SHIFT) |
> > + (0xfUL << ID_AA64ISAR1_GPI_SHIFT));
> > }
> >
> > return val;
> >
>
> Applied and pushed to -next. Thanks Andrew for reporting it, and
> Kristina for putting me right!
I was worried this was my mistake... but it looks like my original
suggstion did have the extra ().
Anyway, FWIW,
Acked-by: Dave Martin <Dave.Martin@arm.com>
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^ permalink raw reply [flat|nested] 5+ messages in thread
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2019-05-01 16:10 [PATCH] KVM: arm64: fix ptrauth ID register masking logic Kristina Martsenko
2019-05-01 16:16 ` Will Deacon
2019-05-01 16:20 ` Andrew Murray
2019-05-01 16:20 ` Marc Zyngier
2019-05-02 8:53 ` Dave Martin
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