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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id k65sm184077oia.16.2019.05.02.13.59.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 02 May 2019 13:59:02 -0700 (PDT) Date: Thu, 2 May 2019 15:59:01 -0500 From: Rob Herring To: Chuanhua Han Subject: Re: [PATCH 1/3] dt-bindings: i2c: add optional mul-value property to binding Message-ID: <20190502205901.GA24224@bogus> References: <20190430043242.29687-1-chuanhua.han@nxp.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20190430043242.29687-1-chuanhua.han@nxp.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190502_135904_493914_0517DCAC X-CRM114-Status: GOOD ( 17.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, sumit.batra@nxp.com, eha@deif.com, festevam@gmail.com, s.hauer@pengutronix.de, linux-kernel@vger.kernel.org, leoyang.li@nxp.com, wsa+renesas@sang-engineering.com, l.stach@pengutronix.de, linux-i2c@vger.kernel.org, kernel@pengutronix.de, u.kleine-koenig@pengutronix.de, linux@rempel-privat.de, shawnguo@kernel.org, peda@axentia.se, linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Apr 30, 2019 at 12:32:40PM +0800, Chuanhua Han wrote: > NXP Layerscape SoC have up to three MUL options available for all > divider values, we choice of MUL determines the internal monitor rate > of the I2C bus (SCL and SDA signals): > A lower MUL value results in a higher sampling rate of the I2C signals. > A higher MUL value results in a lower sampling rate of the I2C signals. > > So in Optional properties we added our custom mul-value property in the > binding to select which mul option for the device tree i2c controller > node. > > Signed-off-by: Chuanhua Han > --- > Documentation/devicetree/bindings/i2c/i2c-imx.txt | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.txt b/Documentation/devicetree/bindings/i2c/i2c-imx.txt > index b967544590e8..ba8e7b7b3fa8 100644 > --- a/Documentation/devicetree/bindings/i2c/i2c-imx.txt > +++ b/Documentation/devicetree/bindings/i2c/i2c-imx.txt > @@ -18,6 +18,9 @@ Optional properties: > - sda-gpios: specify the gpio related to SDA pin > - pinctrl: add extra pinctrl to configure i2c pins to gpio function for i2c > bus recovery, call it "gpio" state > +- mul-value: NXP Layerscape SoC have up to three MUL options available for > +all I2C divider values, it describes which MUL we choose to use for the driver, > +the values should be 1,2,4. Needs a vendor prefix. I don't find 'value' to add anything nor do I understand what MUL is. If it is determined by SoC rather than board, then it should perhaps be implied by compatible. Rob _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel