From: Maxime Ripard <maxime.ripard@bootlin.com>
To: Jernej Skrabec <jernej.skrabec@siol.net>
Cc: airlied@linux.ie, linux-sunxi@googlegroups.com,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
wens@csie.org, daniel@ffwll.ch,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 0/2] drm/sun4i: Fix sun8i HDMI PHY initialization
Date: Thu, 16 May 2019 10:31:04 +0200 [thread overview]
Message-ID: <20190516083104.rr2ewg3dd4aej67b@flea> (raw)
In-Reply-To: <20190514204337.11068-1-jernej.skrabec@siol.net>
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On Tue, May 14, 2019 at 10:43:35PM +0200, Jernej Skrabec wrote:
> I received a report that 4K resolution doesn't work if U-Boot video
> driver is disabled. It turns out that HDMI PHY clock driver was
> initialized prematurely, before reset line was deasserted and clocks
> enabled. U-Boot video driver masked the issue because it set pixel
> clock correctly.
>
> In the process of researching the bug, I also found out that few bits
> in HDMI PHY registers were not set correctly. While there is no
> noticeable change (4K resolution works with both settings), I've
> added fix anyway, to be conformant with vendor documentation.
Applied both, thanks
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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prev parent reply other threads:[~2019-05-16 8:31 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-14 20:43 [PATCH 0/2] drm/sun4i: Fix sun8i HDMI PHY initialization Jernej Skrabec
2019-05-14 20:43 ` [PATCH 1/2] drm/sun4i: Fix sun8i HDMI PHY clock initialization Jernej Skrabec
2019-05-14 20:43 ` [PATCH 2/2] drm/sun4i: Fix sun8i HDMI PHY configuration for > 148.5 MHz Jernej Skrabec
2019-05-16 8:31 ` Maxime Ripard [this message]
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