* [PATCH 1/2] clk: imx8mm: Mark dram_apb critical @ 2019-05-13 5:32 Leonard Crestez 2019-05-13 5:32 ` [PATCH 2/2] clk: imx8mm: Add gic clk Leonard Crestez 2019-05-20 7:06 ` [PATCH 1/2] clk: imx8mm: Mark dram_apb critical Shawn Guo 0 siblings, 2 replies; 4+ messages in thread From: Leonard Crestez @ 2019-05-13 5:32 UTC (permalink / raw) To: Jacky Bai, Stephen Boyd, Shawn Guo Cc: Aisheng Dong, Abel Vesa, Anson Huang, Michael Turquette, dl-linux-imx, kernel@pengutronix.de, Fabio Estevam, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org This clock is used for dram operations inside TF-A and must be kept enabled for features such as suspend/resume dram retention and busfreq to work. This is required for imx8mm suspend to work with NXP branch of TF-A. There is an equivalent clk on imx8mq and it's always been marked as critical in upstream. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> --- drivers/clk/imx/clk-imx8mm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c index 1ef8438e3d6d..fbb61c2f12d0 100644 --- a/drivers/clk/imx/clk-imx8mm.c +++ b/drivers/clk/imx/clk-imx8mm.c @@ -521,11 +521,11 @@ static int __init imx8mm_clocks_init(struct device_node *ccm_node) clks[IMX8MM_CLK_IPG_ROOT] = imx_clk_divider2("ipg_root", "ahb", base + 0x9080, 0, 1); clks[IMX8MM_CLK_IPG_AUDIO_ROOT] = imx_clk_divider2("ipg_audio_root", "audio_ahb", base + 0x9180, 0, 1); /* IP */ clks[IMX8MM_CLK_DRAM_ALT] = imx8m_clk_composite("dram_alt", imx8mm_dram_alt_sels, base + 0xa000); - clks[IMX8MM_CLK_DRAM_APB] = imx8m_clk_composite("dram_apb", imx8mm_dram_apb_sels, base + 0xa080); + clks[IMX8MM_CLK_DRAM_APB] = imx8m_clk_composite_critical("dram_apb", imx8mm_dram_apb_sels, base + 0xa080); clks[IMX8MM_CLK_VPU_G1] = imx8m_clk_composite("vpu_g1", imx8mm_vpu_g1_sels, base + 0xa100); clks[IMX8MM_CLK_VPU_G2] = imx8m_clk_composite("vpu_g2", imx8mm_vpu_g2_sels, base + 0xa180); clks[IMX8MM_CLK_DISP_DTRC] = imx8m_clk_composite("disp_dtrc", imx8mm_disp_dtrc_sels, base + 0xa200); clks[IMX8MM_CLK_DISP_DC8000] = imx8m_clk_composite("disp_dc8000", imx8mm_disp_dc8000_sels, base + 0xa280); clks[IMX8MM_CLK_PCIE1_CTRL] = imx8m_clk_composite("pcie1_ctrl", imx8mm_pcie1_ctrl_sels, base + 0xa300); -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] clk: imx8mm: Add gic clk 2019-05-13 5:32 [PATCH 1/2] clk: imx8mm: Mark dram_apb critical Leonard Crestez @ 2019-05-13 5:32 ` Leonard Crestez 2019-05-20 7:08 ` Shawn Guo 2019-05-20 7:06 ` [PATCH 1/2] clk: imx8mm: Mark dram_apb critical Shawn Guo 1 sibling, 1 reply; 4+ messages in thread From: Leonard Crestez @ 2019-05-13 5:32 UTC (permalink / raw) To: Jacky Bai, Stephen Boyd, Shawn Guo Cc: Aisheng Dong, Abel Vesa, Anson Huang, Michael Turquette, dl-linux-imx, kernel@pengutronix.de, Fabio Estevam, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org This is documented in the reference manual as GIC_CLK_ROOT. In some out-of-tree DVFS the gic clock can end up as the only user of sys_pll2 so if we don't define the gic clk explicitly it might be turned off. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> --- I'm not sure adding clks from the reference manual needs justification. --- drivers/clk/imx/clk-imx8mm.c | 4 ++++ include/dt-bindings/clock/imx8mm-clock.h | 3 ++- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c index fbb61c2f12d0..8b2f0013639d 100644 --- a/drivers/clk/imx/clk-imx8mm.c +++ b/drivers/clk/imx/clk-imx8mm.c @@ -286,10 +286,13 @@ static const char *imx8mm_usb_core_sels[] = {"osc_24m", "sys_pll1_100m", "sys_pl "sys_pll2_200m", "clk_ext2", "clk_ext3", "audio_pll2_out", }; static const char *imx8mm_usb_phy_sels[] = {"osc_24m", "sys_pll1_100m", "sys_pll1_40m", "sys_pll2_100m", "sys_pll2_200m", "clk_ext2", "clk_ext3", "audio_pll2_out", }; +static const char *imx8mm_gic_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll2_100m", + "sys_pll1_800m", "clk_ext2", "clk_ext4", "audio_pll2_out" }; + static const char *imx8mm_ecspi1_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out", "sys_pll2_250m", "audio_pll2_out", }; static const char *imx8mm_ecspi2_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out", "sys_pll2_250m", "audio_pll2_out", }; @@ -556,10 +559,11 @@ static int __init imx8mm_clocks_init(struct device_node *ccm_node) clks[IMX8MM_CLK_UART2] = imx8m_clk_composite("uart2", imx8mm_uart2_sels, base + 0xaf80); clks[IMX8MM_CLK_UART3] = imx8m_clk_composite("uart3", imx8mm_uart3_sels, base + 0xb000); clks[IMX8MM_CLK_UART4] = imx8m_clk_composite("uart4", imx8mm_uart4_sels, base + 0xb080); clks[IMX8MM_CLK_USB_CORE_REF] = imx8m_clk_composite("usb_core_ref", imx8mm_usb_core_sels, base + 0xb100); clks[IMX8MM_CLK_USB_PHY_REF] = imx8m_clk_composite("usb_phy_ref", imx8mm_usb_phy_sels, base + 0xb180); + clks[IMX8MM_CLK_GIC] = imx8m_clk_composite_critical("gic", imx8mm_gic_sels, base + 0xb200); clks[IMX8MM_CLK_ECSPI1] = imx8m_clk_composite("ecspi1", imx8mm_ecspi1_sels, base + 0xb280); clks[IMX8MM_CLK_ECSPI2] = imx8m_clk_composite("ecspi2", imx8mm_ecspi2_sels, base + 0xb300); clks[IMX8MM_CLK_PWM1] = imx8m_clk_composite("pwm1", imx8mm_pwm1_sels, base + 0xb380); clks[IMX8MM_CLK_PWM2] = imx8m_clk_composite("pwm2", imx8mm_pwm2_sels, base + 0xb400); clks[IMX8MM_CLK_PWM3] = imx8m_clk_composite("pwm3", imx8mm_pwm3_sels, base + 0xb480); diff --git a/include/dt-bindings/clock/imx8mm-clock.h b/include/dt-bindings/clock/imx8mm-clock.h index 1b4353e7b486..26f3ad3fbf5d 100644 --- a/include/dt-bindings/clock/imx8mm-clock.h +++ b/include/dt-bindings/clock/imx8mm-clock.h @@ -236,9 +236,10 @@ #define IMX8MM_CLK_DRAM_CORE 220 #define IMX8MM_CLK_DRAM_ALT_ROOT 221 #define IMX8MM_CLK_NAND_USDHC_BUS_RAWNAND_CLK 222 +#define IMX8MM_CLK_GIC 223 -#define IMX8MM_CLK_END 223 +#define IMX8MM_CLK_END 224 #endif -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] clk: imx8mm: Add gic clk 2019-05-13 5:32 ` [PATCH 2/2] clk: imx8mm: Add gic clk Leonard Crestez @ 2019-05-20 7:08 ` Shawn Guo 0 siblings, 0 replies; 4+ messages in thread From: Shawn Guo @ 2019-05-20 7:08 UTC (permalink / raw) To: Leonard Crestez Cc: Aisheng Dong, Jacky Bai, Anson Huang, Stephen Boyd, Michael Turquette, dl-linux-imx, kernel@pengutronix.de, Fabio Estevam, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Abel Vesa On Mon, May 13, 2019 at 05:32:09AM +0000, Leonard Crestez wrote: > This is documented in the reference manual as GIC_CLK_ROOT. > > In some out-of-tree DVFS the gic clock can end up as the only user of > sys_pll2 so if we don't define the gic clk explicitly it might be turned > off. > > Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> It failed to be applied. Please rebase it onto my clk/imx branch. Shawn _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] clk: imx8mm: Mark dram_apb critical 2019-05-13 5:32 [PATCH 1/2] clk: imx8mm: Mark dram_apb critical Leonard Crestez 2019-05-13 5:32 ` [PATCH 2/2] clk: imx8mm: Add gic clk Leonard Crestez @ 2019-05-20 7:06 ` Shawn Guo 1 sibling, 0 replies; 4+ messages in thread From: Shawn Guo @ 2019-05-20 7:06 UTC (permalink / raw) To: Leonard Crestez Cc: Aisheng Dong, Jacky Bai, Anson Huang, Stephen Boyd, Michael Turquette, dl-linux-imx, kernel@pengutronix.de, Fabio Estevam, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Abel Vesa On Mon, May 13, 2019 at 05:32:07AM +0000, Leonard Crestez wrote: > This clock is used for dram operations inside TF-A and must be kept > enabled for features such as suspend/resume dram retention and busfreq > to work. > > This is required for imx8mm suspend to work with NXP branch of TF-A. > There is an equivalent clk on imx8mq and it's always been marked as > critical in upstream. > > Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Applied, thanks. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2019-05-20 7:09 UTC | newest] Thread overview: 4+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2019-05-13 5:32 [PATCH 1/2] clk: imx8mm: Mark dram_apb critical Leonard Crestez 2019-05-13 5:32 ` [PATCH 2/2] clk: imx8mm: Add gic clk Leonard Crestez 2019-05-20 7:08 ` Shawn Guo 2019-05-20 7:06 ` [PATCH 1/2] clk: imx8mm: Mark dram_apb critical Shawn Guo
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