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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id k13sm2809575pgr.90.2019.05.24.10.35.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 24 May 2019 10:35:09 -0700 (PDT) From: Mathieu Poirier To: acme@kernel.org Subject: [PATCH v2 00/17] perf tools: Coresight: Add CPU-wide trace support Date: Fri, 24 May 2019 11:34:51 -0600 Message-Id: <20190524173508.29044-1-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.17.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190524_103512_374661_1AEC7114 X-CRM114-Status: GOOD ( 10.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: suzuki.poulose@arm.com, peterz@infradead.org, coresight@lists.linaro.org, linux-kernel@vger.kernel.org, alexander.shishkin@linux.intel.com, mingo@redhat.com, leo.yan@linaro.org, namhyung@kernel.org, jolsa@redhat.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patchset adds support for CoreSight CPU-wide trace scenarios. More specifically it extends the work that was done for per thread scenarios to handle more than a single trace ID. It also temporally correlate traces based on timestamp generated by the tracers so that rendering by the perf mechanic is ordered. Everything is based on Arnaldo's perf/core branch (46d4c9a05285). I will send another revision when it is rebased to a 5.2 rc candidate. Before this set: # root@juno:/home/linaro# perf record -e cs_etm/@20070000.etr/ -C 2,3 sleep 1 failed to mmap with 12 (Cannot allocate memory) After this set: # root@juno:/home/linaro# perf record -e cs_etm/@20070000.etr/ -C 2,3 sleep 1 [ perf record: Captured and wrote 1.352 MB perf.data ] Regards, Mathieu Changes for V2: * Fixed error condition in function cs_etm_set_option() (Leo) * Fixed changelog spelling error (Leo). * Moved from calloc() to malloc() in cs_etm__etmq_get_traceid_queue() * Got rid of CS_ETM_PACKET_QUEUE_NR macro * Fixed indentation problem in function cs_etm__process_traceid_queue() (Leo). Mathieu Poirier (17): perf tools: Configure contextID tracing in CPU-wide mode perf tools: Configure timestsamp generation in CPU-wide mode perf tools: Configure SWITCH_EVENTS in CPU-wide mode perf tools: Add handling of itrace start events perf tools: Add handling of switch-CPU-wide events perf tools: Refactor error path in cs_etm_decoder__new() perf tools: Move packet queue out of decoder structure perf tools: Fix indentation in function cs_etm__process_decoder_queue() perf tools: Introduce the concept of trace ID queues perf tools: Get rid of unused cpu in struct cs_etm_queue perf tools: Move thread to traceid_queue perf tools: Move tid/pid to traceid_queue perf tools: Use traceID aware memory callback API perf tools: Add support for multiple traceID queues perf tools: Linking PE contextID with perf thread mechanic perf tools: Add notion of time to decoding code perf tools: Add support for CPU-wide trace scenarios tools/perf/Makefile.config | 3 + tools/perf/arch/arm/util/cs-etm.c | 186 ++- .../perf/util/cs-etm-decoder/cs-etm-decoder.c | 269 +++-- .../perf/util/cs-etm-decoder/cs-etm-decoder.h | 39 +- tools/perf/util/cs-etm.c | 1026 +++++++++++++---- tools/perf/util/cs-etm.h | 103 ++ 6 files changed, 1252 insertions(+), 374 deletions(-) -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel