From: Kees Cook <keescook@chromium.org>
To: Kristina Martsenko <kristina.martsenko@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Will Deacon <will.deacon@arm.com>,
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>,
Amit Kachhap <Amit.Kachhap@arm.com>,
Dave Martin <Dave.Martin@arm.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [RFC v2 1/7] arm64: cpufeature: add pointer auth meta-capabilities
Date: Wed, 29 May 2019 18:58:48 -0700 [thread overview]
Message-ID: <201905291853.204A6B7A@keescook> (raw)
In-Reply-To: <20190529190332.29753-2-kristina.martsenko@arm.com>
On Wed, May 29, 2019 at 08:03:26PM +0100, Kristina Martsenko wrote:
> To enable pointer auth for the kernel, we're going to need to check for
> the presence of address auth and generic auth using alternative_if. We
> currently have two cpucaps for each, but alternative_if needs to check a
> single cpucap. So define meta-capabilities that are present when either
> of the current two capabilities is present.
>
> Leave the existing four cpucaps in place, as they are still needed to
> check for mismatched systems where one CPU has the architected algorithm
> but another has the IMP DEF algorithm.
>
> Note, the meta-capabilities were present before but were removed in
> commits a56005d32105 ("arm64: cpufeature: Reduce number of pointer auth
> CPU caps from 6 to 4") and 1e013d06120c ("arm64: cpufeature: Rework ptr
> auth hwcaps using multi_entry_cap_matches"), as they were not needed
> then. Note, unlike before, the current patch checks the cpucap values
> directly, instead of reading the CPU ID register value.
>
> Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
-Kees
> ---
>
> Changes since RFC v1:
> - New patch, as the meta-capabilities have been removed upstream
>
> arch/arm64/include/asm/cpucaps.h | 4 +++-
> arch/arm64/include/asm/cpufeature.h | 6 ++----
> arch/arm64/kernel/cpufeature.c | 25 ++++++++++++++++++++++++-
> 3 files changed, 29 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h
> index f6a76e43f39e..601183b7b484 100644
> --- a/arch/arm64/include/asm/cpucaps.h
> +++ b/arch/arm64/include/asm/cpucaps.h
> @@ -61,7 +61,9 @@
> #define ARM64_HAS_GENERIC_AUTH_ARCH 40
> #define ARM64_HAS_GENERIC_AUTH_IMP_DEF 41
> #define ARM64_HAS_IRQ_PRIO_MASKING 42
> +#define ARM64_HAS_ADDRESS_AUTH 43
> +#define ARM64_HAS_GENERIC_AUTH 44
>
> -#define ARM64_NCAPS 43
> +#define ARM64_NCAPS 45
>
> #endif /* __ASM_CPUCAPS_H */
> diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
> index e505e1fbd2b9..0522ea674253 100644
> --- a/arch/arm64/include/asm/cpufeature.h
> +++ b/arch/arm64/include/asm/cpufeature.h
> @@ -605,15 +605,13 @@ static inline bool system_supports_cnp(void)
> static inline bool system_supports_address_auth(void)
> {
> return IS_ENABLED(CONFIG_ARM64_PTR_AUTH) &&
> - (cpus_have_const_cap(ARM64_HAS_ADDRESS_AUTH_ARCH) ||
> - cpus_have_const_cap(ARM64_HAS_ADDRESS_AUTH_IMP_DEF));
> + cpus_have_const_cap(ARM64_HAS_ADDRESS_AUTH);
> }
>
> static inline bool system_supports_generic_auth(void)
> {
> return IS_ENABLED(CONFIG_ARM64_PTR_AUTH) &&
> - (cpus_have_const_cap(ARM64_HAS_GENERIC_AUTH_ARCH) ||
> - cpus_have_const_cap(ARM64_HAS_GENERIC_AUTH_IMP_DEF));
> + cpus_have_const_cap(ARM64_HAS_GENERIC_AUTH);
> }
>
> static inline bool system_uses_irq_prio_masking(void)
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index 4061de10cea6..166584deaed2 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -1205,6 +1205,20 @@ static void cpu_enable_address_auth(struct arm64_cpu_capabilities const *cap)
> sysreg_clear_set(sctlr_el1, 0, SCTLR_ELx_ENIA | SCTLR_ELx_ENIB |
> SCTLR_ELx_ENDA | SCTLR_ELx_ENDB);
> }
> +
> +static bool has_address_auth(const struct arm64_cpu_capabilities *entry,
> + int __unused)
> +{
> + return cpus_have_const_cap(ARM64_HAS_ADDRESS_AUTH_ARCH) ||
> + cpus_have_const_cap(ARM64_HAS_ADDRESS_AUTH_IMP_DEF);
> +}
> +
> +static bool has_generic_auth(const struct arm64_cpu_capabilities *entry,
> + int __unused)
> +{
> + return cpus_have_const_cap(ARM64_HAS_GENERIC_AUTH_ARCH) ||
> + cpus_have_const_cap(ARM64_HAS_GENERIC_AUTH_IMP_DEF);
> +}
> #endif /* CONFIG_ARM64_PTR_AUTH */
>
> #ifdef CONFIG_ARM64_PSEUDO_NMI
> @@ -1466,7 +1480,6 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
> .field_pos = ID_AA64ISAR1_APA_SHIFT,
> .min_field_value = ID_AA64ISAR1_APA_ARCHITECTED,
> .matches = has_cpuid_feature,
> - .cpu_enable = cpu_enable_address_auth,
> },
> {
> .desc = "Address authentication (IMP DEF algorithm)",
> @@ -1477,6 +1490,11 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
> .field_pos = ID_AA64ISAR1_API_SHIFT,
> .min_field_value = ID_AA64ISAR1_API_IMP_DEF,
> .matches = has_cpuid_feature,
> + },
> + {
> + .capability = ARM64_HAS_ADDRESS_AUTH,
> + .type = ARM64_CPUCAP_SYSTEM_FEATURE,
> + .matches = has_address_auth,
> .cpu_enable = cpu_enable_address_auth,
> },
> {
> @@ -1499,6 +1517,11 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
> .min_field_value = ID_AA64ISAR1_GPI_IMP_DEF,
> .matches = has_cpuid_feature,
> },
> + {
> + .capability = ARM64_HAS_GENERIC_AUTH,
> + .type = ARM64_CPUCAP_SYSTEM_FEATURE,
> + .matches = has_generic_auth,
> + },
> #endif /* CONFIG_ARM64_PTR_AUTH */
> #ifdef CONFIG_ARM64_PSEUDO_NMI
> {
> --
> 2.11.0
>
--
Kees Cook
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next prev parent reply other threads:[~2019-05-30 1:58 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-29 19:03 [RFC v2 0/7] arm64: return address signing Kristina Martsenko
2019-05-29 19:03 ` [RFC v2 1/7] arm64: cpufeature: add pointer auth meta-capabilities Kristina Martsenko
2019-05-30 1:58 ` Kees Cook [this message]
2019-05-30 10:50 ` Suzuki K Poulose
2019-06-13 16:13 ` Suzuki K Poulose
2019-05-29 19:03 ` [RFC v2 2/7] arm64: install user ptrauth keys at kernel exit time Kristina Martsenko
2019-05-30 2:04 ` Kees Cook
2019-06-06 16:26 ` Catalin Marinas
2019-05-29 19:03 ` [RFC v2 3/7] arm64: cpufeature: handle conflicts based on capability Kristina Martsenko
2019-05-30 2:49 ` Kees Cook
2019-05-30 14:16 ` Suzuki K Poulose
2019-05-31 14:00 ` Kristina Martsenko
2019-05-31 15:08 ` Suzuki K Poulose
2019-05-29 19:03 ` [RFC v2 4/7] arm64: enable ptrauth earlier Kristina Martsenko
2019-05-30 3:11 ` Kees Cook
2019-06-13 15:41 ` Suzuki K Poulose
2019-05-29 19:03 ` [RFC v2 5/7] arm64: initialize and switch ptrauth kernel keys Kristina Martsenko
2019-05-30 3:34 ` Kees Cook
2019-05-30 16:26 ` Kristina Martsenko
2019-06-04 10:03 ` Dave Martin
2019-06-06 16:44 ` Catalin Marinas
2019-06-12 16:21 ` Kristina Martsenko
2019-06-13 10:44 ` Catalin Marinas
2019-05-29 19:03 ` [RFC v2 6/7] arm64: unwind: strip PAC from kernel addresses Kristina Martsenko
2019-05-30 3:36 ` Kees Cook
2019-05-29 19:03 ` [RFC v2 7/7] arm64: compile the kernel with ptrauth return address signing Kristina Martsenko
2019-05-30 3:45 ` Kees Cook
2019-05-30 3:09 ` [RFC v2 0/7] arm64: " Kees Cook
2019-05-30 7:25 ` Will Deacon
2019-05-30 8:39 ` Ard Biesheuvel
2019-05-30 9:11 ` Ramana Radhakrishnan
2019-05-30 9:12 ` Ramana Radhakrishnan
2019-06-06 17:44 ` Kristina Martsenko
2019-06-08 4:09 ` Kees Cook
[not found] ` <DB7PR08MB3865C4AA36C9C465B2A687DABF180@DB7PR08MB3865.eurprd08.prod.outlook.com>
2019-05-30 15:57 ` Kees Cook
[not found] ` <DB7PR08MB3865A83066179CE419D171EDBF180@DB7PR08MB3865.eurprd08.prod.outlook.com>
2019-05-30 18:05 ` Kees Cook
2019-05-31 9:22 ` Will Deacon
2019-06-02 15:43 ` Kees Cook
2019-06-03 10:40 ` Will Deacon
2019-06-04 13:52 ` Luke Cheeseman
2019-06-06 17:43 ` Kristina Martsenko
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