From: Shawn Guo <shawnguo@kernel.org>
To: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH V2] ARM: dts: imx53: Bind CPLD on M53Menlo
Date: Thu, 6 Jun 2019 09:55:12 +0800 [thread overview]
Message-ID: <20190606015451.GS29853@dragon> (raw)
In-Reply-To: <20190601223050.27410-1-marex@denx.de>
On Sun, Jun 02, 2019 at 12:30:50AM +0200, Marek Vasut wrote:
> Enable ECSPI2 and bind CPLD to both chip selects.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: NXP Linux Team <linux-imx@nxp.com>
> To: linux-arm-kernel@lists.infradead.org
> ---
> V2: Drop fsl,spi-num-chipselects
> ---
> arch/arm/boot/dts/imx53-m53menlo.dts | 30 ++++++++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx53-m53menlo.dts b/arch/arm/boot/dts/imx53-m53menlo.dts
> index 55c122a64ef0..1deb070c1c21 100644
> --- a/arch/arm/boot/dts/imx53-m53menlo.dts
> +++ b/arch/arm/boot/dts/imx53-m53menlo.dts
> @@ -100,6 +100,25 @@
> assigned-clock-rates = <133333334>, <33333334>, <33333334>;
> };
>
> +&ecspi2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_ecspi2>;
> + cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>, <&gpio2 27 GPIO_ACTIVE_HIGH>;
> + status = "okay";
> +
> + spidev@0 {
> + compatible = "menlo,m53cpld", "spidev";
Don't you get the following warning from kernel?
OF: buggy DT: spidev listed directly in DT
> + spi-max-frequency = <25000000>;
> + reg = <0>;
> + };
> +
> + spidev@1 {
> + compatible = "menlo,m53cpld", "spidev";
> + spi-max-frequency = <25000000>;
> + reg = <1>;
> + };
> +};
> +
> &esdhc1 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_esdhc1>;
> @@ -301,6 +320,17 @@
> >;
> };
>
> + pinctrl_ecspi2: ecspi2grp {
> + fsl,pins = <
> + MX53_PAD_EIM_CS0__ECSPI2_SCLK 0xe4
> + MX53_PAD_EIM_OE__ECSPI2_MISO 0xe4
> + MX53_PAD_EIM_CS1__ECSPI2_MOSI 0xe4
> +
Nit: unnecessary newline.
Shawn
> + MX53_PAD_EIM_RW__GPIO2_26 0xe4
> + MX53_PAD_EIM_LBA__GPIO2_27 0xe4
> + >;
> + };
> +
> pinctrl_esdhc1: esdhc1grp {
> fsl,pins = <
> MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1e4
> --
> 2.20.1
>
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next prev parent reply other threads:[~2019-06-06 1:55 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-01 22:30 [PATCH V2] ARM: dts: imx53: Bind CPLD on M53Menlo Marek Vasut
2019-06-06 1:55 ` Shawn Guo [this message]
2019-06-06 1:57 ` Fabio Estevam
2019-06-06 2:06 ` Shawn Guo
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