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DIR:OUT; SFP:1101; SCL:1; SRVR:DB8PR08MB5099; H:DB8PR08MB4105.eurprd08.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: RFfhgBGh6MtVdxXtIBj5UJkdPISzBXeNB9n7NcOQQyH4Fh0Fm9qZZT2XXvB9oDU/2p14MxL0SHeTplvTzciOg6DxxADlUTGOCWIGU6MwU/Q9XEs7LEniofpLYyqICzAYefBevGJDNbj+EbHsXhxY5nwgX75+9WAHetO45Y7C0ykJfeoSMdr4/H0CwwdiT8XDWMwF50bBHYY/wmCIbOXOq+Uwr4wtEHMDwR1L4sx5t8DXdD1lJnPfrjtoZcuKpZcIzmNN4H6/HympIC0yAjQwWshA9COrtL3opnNw2HvxTmmSma6tRYlxF9KzOEw5Rtp85Xv1/A1WlLx8UeaTMmP3VMq98RlmL116/ATiFNK45JU/Zx1H6nNkwuBSLkc7GeB4wM6vykqwZB8gf1Rsg27Gyyjh/RSoA7trKSC8lJwrtvk= Content-ID: <608A9A2FFD7D93499E0913E814A43B17@eurprd08.prod.outlook.com> MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0f2816b0-2533-4d7d-7cc0-08d6eb33afa1 X-MS-Exchange-CrossTenant-originalarrivaltime: 07 Jun 2019 10:34:15.2843 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Steve.Capper@arm.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB8PR08MB5099 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190607_033421_493507_3E06083B X-CRM114-Status: GOOD ( 20.98 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "crecklin@redhat.com" , "ard.biesheuvel@linaro.org" , Marc Zyngier , "bhsharma@redhat.com" , Will Deacon , nd , "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Jun 05, 2019 at 04:34:41PM +0100, Catalin Marinas wrote: > Hi Steve, Hi Catalin, > > On Tue, May 28, 2019 at 05:10:26PM +0100, Steve Capper wrote: > > config ARM64_USER_VA_BITS_52 > > bool "52-bit (user)" > > depends on ARM64_64K_PAGES && (ARM64_PAN || !ARM64_SW_TTBR0_PAN) > > + select HAS_VA_BITS_52 > > help > > Enable 52-bit virtual addressing for userspace when explicitly > > requested via a hint to mmap(). The kernel will continue to > > @@ -751,11 +755,28 @@ config ARM64_USER_VA_BITS_52 > > > > If unsure, select 48-bit virtual addressing instead. > > > > +config ARM64_USER_KERNEL_VA_BITS_52 > > + bool "52-bit (user & kernel)" > > + depends on ARM64_64K_PAGES && (ARM64_PAN || !ARM64_SW_TTBR0_PAN) > > + select HAS_VA_BITS_52 > > + help > > + Enable 52-bit virtual addressing for userspace when explicitly > > + requested via a hint to mmap(). The kernel will also use 52-bit > > + virtual addresses for its own mappings (provided HW support for > > + this feature is available, otherwise it reverts to 48-bit). > > + > > + NOTE: Enabling 52-bit virtual addressing in conjunction with > > + ARMv8.3 Pointer Authentication will result in the PAC being > > + reduced from 7 bits to 3 bits, which may have a significant > > + impact on its susceptibility to brute-force attacks. > > + > > + If unsure, select 48-bit virtual addressing instead. > > With the latest version of this series, it doesn't look like will get a > performance hit for enabling 52-bit VA for the kernel (well, subject to > some testing). If that's the case, is it still worth having separate > user and user+kernel 52-bit VA Kconfig entries? It also gets pretty > confusing as I think you can now select both or just the latter for the > same feature. Yeah, I was wondering if it would be better to just have a single 52-bit VA configuration entry. I think the performance should be fine. > > BTW, do you plan to repost following comments? At a quick look, the > reset of the patches seem fine to me. > Thanks :-) I'll repost another version of the series with a few simplifications that Ard and Marc mentioned along with single 52-bit VA configuration option. Cheers, -- Steve _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel