From: Sudeep Holla <sudeep.holla@arm.com>
To: Andrew Murray <andrew.murray@arm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Sudeep Holla <sudeep.holla@arm.com>,
linux-arm-kernel@lists.infradead.org,
Mathieu Poirier <mathieu.poirier@linaro.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>
Subject: Re: [PATCH v1 5/5] coresight: etm4x: save/restore state across CPU low power states
Date: Tue, 18 Jun 2019 14:21:59 +0100 [thread overview]
Message-ID: <20190618132159.GA18121@e107155-lin> (raw)
In-Reply-To: <20190618125433.9739-6-andrew.murray@arm.com>
On Tue, Jun 18, 2019 at 01:54:33PM +0100, Andrew Murray wrote:
> Some hardware will ignore bit TRCPDCR.PU which is used to signal
> to hardware that power should not be removed from the trace unit.
So, how or can we identify or discover such system ? DT/ACPI ?
> Let's mitigate against this by saving and restoring the trace
> unit state when the CPU enters low power states.
>
I prefer to do this conditionally. It's unnecessary on systems which
don't ignore the TRCPDCR.PU and I really don't like them to be penalised
while we want to add this support for *broken* systems.
This is generally most useful to debug CPU suspend/resume exercising
the code path completely with emulated CPU power on/off as most of the
systems have the trace unit and the CPUs in the same power domain.
Just curious if this reported on any platforms ?
I wounder if we can use TRCPDSR(Power Down Status Register) to check the
status. I know on Juno, it doesn't loose context rather the power down
is emulated and saving/restoring may not be needed at all. Have you
tested on Juno with and without these patches and seen any difference ?
--
Regards,
Sudeep
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next prev parent reply other threads:[~2019-06-18 13:32 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-18 12:54 [PATCH v1 0/5] coresight: etm4x: save/restore ETMv4 context across CPU low power states Andrew Murray
2019-06-18 12:54 ` [PATCH v1 1/5] coresight: etm4x: remove superfluous setting of os_unlock Andrew Murray
2019-06-19 10:42 ` Suzuki K Poulose
2019-06-18 12:54 ` [PATCH v1 2/5] coresight: etm4x: use explicit barriers on enable/disable Andrew Murray
2019-06-18 22:34 ` Mathieu Poirier
2019-06-19 8:32 ` Suzuki K Poulose
2019-06-20 10:25 ` Andrew Murray
2019-06-18 12:54 ` [PATCH v1 3/5] coresight: etm4x: use octal permissions for module_params Andrew Murray
2019-06-19 10:43 ` Suzuki K Poulose
2019-06-18 12:54 ` [PATCH v1 4/5] coresight: etm4x: improve clarity of etm4_os_unlock comment Andrew Murray
2019-06-19 10:46 ` Suzuki K Poulose
2019-06-20 10:29 ` Andrew Murray
2019-06-18 12:54 ` [PATCH v1 5/5] coresight: etm4x: save/restore state across CPU low power states Andrew Murray
2019-06-18 13:21 ` Sudeep Holla [this message]
2019-06-19 10:38 ` Suzuki K Poulose
2019-06-19 11:07 ` Sudeep Holla
2019-06-19 16:22 ` Mathieu Poirier
2019-06-20 11:41 ` Andrew Murray
2019-06-20 14:55 ` Mathieu Poirier
2019-06-20 15:41 ` Sudeep Holla
2019-06-20 16:14 ` Mathieu Poirier
2019-06-20 16:34 ` Sudeep Holla
2019-06-20 16:47 ` Mathieu Poirier
2019-06-20 16:52 ` Sudeep Holla
2019-06-20 16:54 ` Andrew Murray
2019-06-20 17:00 ` Suzuki K Poulose
2019-06-20 17:10 ` Mathieu Poirier
2019-06-21 9:29 ` Andrew Murray
2019-06-21 15:30 ` Mathieu Poirier
2019-06-20 17:11 ` Sudeep Holla
2019-06-20 18:00 ` Mathieu Poirier
2019-06-20 16:48 ` Sudeep Holla
2019-06-18 22:55 ` Mathieu Poirier
2019-06-20 11:07 ` Andrew Murray
2019-06-20 14:49 ` Mathieu Poirier
2019-06-20 15:11 ` Andrew Murray
2019-06-20 15:26 ` Mathieu Poirier
2019-06-25 10:07 ` Suzuki K Poulose
2019-06-25 19:57 ` Mathieu Poirier
2019-06-26 10:21 ` Mike Leach
2019-06-26 16:57 ` Mathieu Poirier
2019-06-27 8:12 ` Andrew Murray
2019-06-27 8:17 ` Andrew Murray
2019-06-20 16:45 ` [PATCH v1 0/5] coresight: etm4x: save/restore ETMv4 context " Suzuki K Poulose
2019-06-20 16:57 ` Andrew Murray
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