From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_MUTT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3549C48BD6 for ; Thu, 27 Jun 2019 14:38:53 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B02F620828 for ; Thu, 27 Jun 2019 14:38:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="rzjczfQx" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B02F620828 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=LdqF/Cj2BmsZjScmPKx51v57sDmKya4kDCNQ+vg2QTM=; b=rzjczfQxLqIgBW bmF7ubi2L2+UmE7re906TDWM1VP8Ut/Q4IKn28nyM3mTlDZzzZ7waKtW3/XDATgJ6oUtgCVqhq1Dk OO7t4HycEQgrhwHFGZ0m4/KWMfVkHWppKIBqWMDcho+AkDaBol+g0tleG2iAWrHHdtXHn5Qgd7hkn ULtug3LW8glpaOQIrysbvCA4JemTJx9WFfofXHBjCCI4fAXpuwEp5N1kr9dX/OZ6r04qva9Yus938 JD6izaHpZi4kcp6Q+SGrC4kjDSQSPwHL0o84DnsvOb2xCcVMwnNnUL8uxlNmJj5TOcJ8VSD5RqaXu sk3dOr+h0SOMQhhv9iKg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hgVY5-000792-4b; Thu, 27 Jun 2019 14:38:53 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hgVXv-00072Z-5R for linux-arm-kernel@lists.infradead.org; Thu, 27 Jun 2019 14:38:45 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 72489360; Thu, 27 Jun 2019 07:38:42 -0700 (PDT) Received: from e121166-lin.cambridge.arm.com (unknown [10.1.196.255]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DD71B3F246; Thu, 27 Jun 2019 07:38:39 -0700 (PDT) Date: Thu, 27 Jun 2019 15:38:37 +0100 From: Lorenzo Pieralisi To: Vidya Sagar Subject: Re: [PATCH V11 01/12] PCI: Add #defines for some of PCIe spec r4.0 features Message-ID: <20190627143837.GC3782@e121166-lin.cambridge.arm.com> References: <20190624091505.1711-1-vidyas@nvidia.com> <20190624091505.1711-2-vidyas@nvidia.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20190624091505.1711-2-vidyas@nvidia.com> User-Agent: Mutt/1.9.4 (2018-02-28) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190627_073843_442294_869D28DB X-CRM114-Status: GOOD ( 12.82 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, mperttunen@nvidia.com, mmaddireddy@nvidia.com, linux-pci@vger.kernel.org, catalin.marinas@arm.com, will.deacon@arm.com, linux-kernel@vger.kernel.org, kthota@nvidia.com, kishon@ti.com, linux-tegra@vger.kernel.org, robh+dt@kernel.org, thierry.reding@gmail.com, gustavo.pimentel@synopsys.com, jingoohan1@gmail.com, bhelgaas@google.com, digetx@gmail.com, jonathanh@nvidia.com, linux-arm-kernel@lists.infradead.org, sagar.tv@gmail.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Jun 24, 2019 at 02:44:54PM +0530, Vidya Sagar wrote: > Add #defines only for the Data Link Feature and Physical Layer 16.0 GT/s > features. > > Signed-off-by: Vidya Sagar > Reviewed-by: Thierry Reding > --- > Changes since [v10]: > * None > > Changes since [v9]: > * None > > Changes since [v8]: > * None > > Changes since [v7]: > * None > > Changes since [v6]: > * None > > Changes since [v5]: > * None > > Changes since [v4]: > * None > > Changes since [v3]: > * None > > Changes since [v2]: > * Updated commit message and description to explicitly mention that defines are > added only for some of the features and not all. > > Changes since [v1]: > * None > > include/uapi/linux/pci_regs.h | 22 +++++++++++++++++++++- > 1 file changed, 21 insertions(+), 1 deletion(-) I need Bjorn's ACK to merge this patch. Lorenzo > diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h > index f28e562d7ca8..1c79f6a097d2 100644 > --- a/include/uapi/linux/pci_regs.h > +++ b/include/uapi/linux/pci_regs.h > @@ -713,7 +713,9 @@ > #define PCI_EXT_CAP_ID_DPC 0x1D /* Downstream Port Containment */ > #define PCI_EXT_CAP_ID_L1SS 0x1E /* L1 PM Substates */ > #define PCI_EXT_CAP_ID_PTM 0x1F /* Precision Time Measurement */ > -#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_PTM > +#define PCI_EXT_CAP_ID_DLF 0x25 /* Data Link Feature */ > +#define PCI_EXT_CAP_ID_PL 0x26 /* Physical Layer 16.0 GT/s */ > +#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_PL > > #define PCI_EXT_CAP_DSN_SIZEOF 12 > #define PCI_EXT_CAP_MCAST_ENDPOINT_SIZEOF 40 > @@ -1053,4 +1055,22 @@ > #define PCI_L1SS_CTL1_LTR_L12_TH_SCALE 0xe0000000 /* LTR_L1.2_THRESHOLD_Scale */ > #define PCI_L1SS_CTL2 0x0c /* Control 2 Register */ > > +/* Data Link Feature */ > +#define PCI_DLF_CAP 0x04 /* Capabilities Register */ > +#define PCI_DLF_LOCAL_DLF_SUP_MASK 0x007fffff /* Local Data Link Feature Supported */ > +#define PCI_DLF_EXCHANGE_ENABLE 0x80000000 /* Data Link Feature Exchange Enable */ > +#define PCI_DLF_STS 0x08 /* Status Register */ > +#define PCI_DLF_REMOTE_DLF_SUP_MASK 0x007fffff /* Remote Data Link Feature Supported */ > +#define PCI_DLF_REMOTE_DLF_SUP_VALID 0x80000000 /* Remote Data Link Feature Support Valid */ > + > +/* Physical Layer 16.0 GT/s */ > +#define PCI_PL_16GT_CAP 0x04 /* Capabilities Register */ > +#define PCI_PL_16GT_CTRL 0x08 /* Control Register */ > +#define PCI_PL_16GT_STS 0x0c /* Status Register */ > +#define PCI_PL_16GT_LDPM_STS 0x10 /* Local Data Parity Mismatch Status Register */ > +#define PCI_PL_16GT_FRDPM_STS 0x14 /* First Retimer Data Parity Mismatch Status Register */ > +#define PCI_PL_16GT_SRDPM_STS 0x18 /* Second Retimer Data Parity Mismatch Status Register */ > +#define PCI_PL_16GT_RSVD 0x1C /* Reserved */ > +#define PCI_PL_16GT_LE_CTRL 0x20 /* Lane Equalization Control Register */ > + > #endif /* LINUX_PCI_REGS_H */ > -- > 2.17.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel