From: Shawn Guo <shawnguo@kernel.org>
To: Anson.Huang@nxp.com
Cc: peng.fan@nxp.com, ping.bai@nxp.com, sboyd@kernel.org,
mturquette@baylibre.com, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org, Linux-imx@nxp.com,
kernel@pengutronix.de, leonard.crestez@nxp.com,
festevam@gmail.com, s.hauer@pengutronix.de,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH RESEND 1/2] clk: imx8mm: Fix typo of pwm3 clock's mux option #4
Date: Thu, 18 Jul 2019 14:53:16 +0800 [thread overview]
Message-ID: <20190718065314.GJ3738@dragon> (raw)
In-Reply-To: <20190626012803.45627-1-Anson.Huang@nxp.com>
On Wed, Jun 26, 2019 at 09:28:02AM +0800, Anson.Huang@nxp.com wrote:
> From: Anson Huang <Anson.Huang@nxp.com>
>
> i.MX8MM has no sys3_pll2_out clock, PWM3 clock's mux option #4
> should be sys_pll3_out, sys3_pll2_out is a typo, fix it.
>
> Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm")
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Applied both, thanks.
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prev parent reply other threads:[~2019-07-18 6:53 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-26 1:28 [PATCH RESEND 1/2] clk: imx8mm: Fix typo of pwm3 clock's mux option #4 Anson.Huang
2019-06-26 1:28 ` [PATCH RESEND 2/2] clk: imx8mm: GPT1 clock mux option #5 should be sys_pll1_80m Anson.Huang
2019-07-18 6:53 ` Shawn Guo [this message]
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