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Mon, 22 Jul 2019 14:05:41 -0500 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 22 Jul 2019 14:05:41 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 22 Jul 2019 14:05:41 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x6MJ5fVW064571; Mon, 22 Jul 2019 14:05:41 -0500 Received: from localhost (irmo.dhcp.ti.com [128.247.58.153]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id x6MJ5fZ02573; Mon, 22 Jul 2019 14:05:41 -0500 (CDT) From: Suman Anna To: Tero Kristo , Nishanth Menon Subject: [PATCH 2/2] arm64: dts: ti: k3-j721e-main: Add hwspinlock node Date: Mon, 22 Jul 2019 14:05:39 -0500 Message-ID: <20190722190539.27816-3-s-anna@ti.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190722190539.27816-1-s-anna@ti.com> References: <20190722190539.27816-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190722_120543_770985_63E4C58C X-CRM114-Status: GOOD ( 10.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org The Main NavSS block on J721E SoCs contains a HwSpinlock IP instance that is same as the IP on AM65x SoCs and similar to the IP on some OMAP SoCs. Add the DT node for this on J721E SoCs. The node is present within the Main NavSS block, and is added as a child node under the cbass_main_navss interconnect node. Signed-off-by: Suman Anna --- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index a01308142f77..a2e031f7d88e 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -89,6 +89,12 @@ ti,sci-rm-range-vint = <0xa>; ti,sci-rm-range-global-event = <0xd>; }; + + hwspinlock: spinlock@30e00000 { + compatible = "ti,am654-hwspinlock"; + reg = <0x00 0x30e00000 0x00 0x1000>; + #hwlock-cells = <1>; + }; }; secure_proxy_main: mailbox@32c00000 { -- 2.22.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel