From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC28AC32751 for ; Wed, 31 Jul 2019 16:46:13 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7876E206A2 for ; Wed, 31 Jul 2019 16:46:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="WRCb1dM+" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7876E206A2 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=K/5D/reVUWKX7csVJmF/TwsAyYKZBsPsHNZqIycdZ7A=; b=WRCb1dM+oBKRcn m7ZBAlHz4pCsI5eLEjvT4vdf90dKt1g4czD6/ZZMoJqIuBnLu7vbkybVVaFJNboxn8K9T7bmKfXmh nU+lGgBDX9bLo7PT1tUjAAq5Jj8r8EdIVCfA4mGK5a45d0zAZGloITaEZ0VPaXK6Fj17KQapsZS8H ZeCjQX3ODS5bnZMIjPKwOfVJGvpfNwOuQxoZzWpgN65L+6A0EMHfhYHupRcQucY7zAEfJOj+JRFSv eA3Bwziv3UB3lK96/rEjLNPUhtEIfPn/EZCkcAWSbiY+i7l5LWdWviw8Jzo7InZkDtgSiO7nv22sJ RsI0N/TVM9/f0xuu+FFw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hsrjo-0001cd-EA; Wed, 31 Jul 2019 16:46:04 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hsrjk-0001c9-B0 for linux-arm-kernel@lists.infradead.org; Wed, 31 Jul 2019 16:46:01 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D6337337; Wed, 31 Jul 2019 09:45:59 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 814443F71F; Wed, 31 Jul 2019 09:45:58 -0700 (PDT) Date: Wed, 31 Jul 2019 17:45:56 +0100 From: Mark Rutland To: Viresh Kumar Subject: Re: [PATCH v4.4 V2 24/43] arm64: Add skeleton to harden the branch predictor against aliasing attacks Message-ID: <20190731164556.GI39768@lakrids.cambridge.arm.com> References: <4349161f0ed572bbc6bff64bad94aa96d07b27ff.1562908075.git.viresh.kumar@linaro.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <4349161f0ed572bbc6bff64bad94aa96d07b27ff.1562908075.git.viresh.kumar@linaro.org> User-Agent: Mutt/1.11.1+11 (2f07cb52) (2018-12-01) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190731_094600_420251_D90AA95D X-CRM114-Status: GOOD ( 14.84 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Julien Thierry , Marc Zyngier , Catalin Marinas , Will Deacon , stable@vger.kernel.org, mark.brown@arm.com, Russell King , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Jul 12, 2019 at 10:58:12AM +0530, Viresh Kumar wrote: > From: Will Deacon > > commit 0f15adbb2861ce6f75ccfc5a92b19eae0ef327d0 upstream. > > Aliasing attacks against CPU branch predictors can allow an attacker to > redirect speculative control flow on some CPUs and potentially divulge > information from one context to another. > > This patch adds initial skeleton code behind a new Kconfig option to > enable implementation-specific mitigations against these attacks for > CPUs that are affected. > > Co-developed-by: Marc Zyngier > Signed-off-by: Will Deacon > Signed-off-by: Catalin Marinas > [ v4.4: Changes made according to 4.4 codebase ] > Signed-off-by: Viresh Kumar [...] > /* id_aa64pfr0 */ > +#define ID_AA64PFR0_CSV2_SHIFT 56 Note: CSV3 is bits 63-60, > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > index 474b34243521..040a42d79990 100644 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@ -83,7 +83,8 @@ static struct arm64_ftr_bits ftr_id_aa64isar0[] = { > }; > > static struct arm64_ftr_bits ftr_id_aa64pfr0[] = { > - ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 32, 32, 0), > + ARM64_FTR_BITS(FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_CSV2_SHIFT, 4, 0), > + ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 32, 28, 0), This line should be: ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 32, 24, 0), ... as it was in the v4.9 backbort, making it cover bits 55:32. As in this patch, it covers 59:32, overlapping with CSV2. We also need to cater for bits 63:60. In the v4.9 backport, the meltdown bits were applied first, so nothing special was necessary. What's the plan w.r.t. meltdown mitigations and v4.4? Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel