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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id q4sm5434151pjq.27.2019.08.01.12.12.32 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Thu, 01 Aug 2019 12:12:33 -0700 (PDT) Date: Thu, 1 Aug 2019 12:14:03 -0700 From: Bjorn Andersson To: Fabien Dessenne Subject: Re: [PATCH 0/6] hwspinlock: allow sharing of hwspinlocks Message-ID: <20190801191403.GA7234@tuxbook-pro> References: <1552492237-28810-1-git-send-email-fabien.dessenne@st.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1552492237-28810-1-git-send-email-fabien.dessenne@st.com> User-Agent: Mutt/1.11.4 (2019-03-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190801_121236_142304_0AA0E77E X-CRM114-Status: GOOD ( 20.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ohad Ben-Cohen , Mark Rutland , Alexandre Torgue , Jonathan Corbet , linux-doc@vger.kernel.org, linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Maxime Coquelin , linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, Benjamin Gaignard Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed 13 Mar 08:50 PDT 2019, Fabien Dessenne wrote: > The current implementation does not allow two different devices to use > a common hwspinlock. This patch set proposes to have, as an option, some > hwspinlocks shared between several users. > > Below is an example that explain the need for this: > exti: interrupt-controller@5000d000 { > compatible = "st,stm32mp1-exti", "syscon"; > interrupt-controller; > #interrupt-cells = <2>; > reg = <0x5000d000 0x400>; > hwlocks = <&hsem 1>; > }; > The two drivers (stm32mp1-exti and syscon) refer to the same hwlock. > With the current hwspinlock implementation, only the first driver succeeds > in requesting (hwspin_lock_request_specific) the hwlock. The second request > fails. > > > The proposed approach does not modify the API, but extends the DT 'hwlocks' > property with a second optional parameter (the first one identifies an > hwlock) that specifies whether an hwlock is requested for exclusive usage > (current behavior) or can be shared between several users. > Examples: > hwlocks = <&hsem 8>; Ref to hwlock #8 for exclusive usage > hwlocks = <&hsem 8 0>; Ref to hwlock #8 for exclusive (0) usage > hwlocks = <&hsem 8 1>; Ref to hwlock #8 for shared (1) usage > > As a constraint, the #hwlock-cells value must be 1 or 2. > In the current implementation, this can have theorically any value but: > - all of the exisiting drivers use the same value : 1. > - the framework supports only one value : 1 (see implementation of > of_hwspin_lock_simple_xlate()) > Hence, it shall not be a problem to restrict this value to 1 or 2 since > it won't break any driver. > Hi Fabien, Your series looks good, but it makes me wonder why the hardware locks should be an exclusive resource. How about just making all (specific) locks shared? Regards, Bjorn > Fabien Dessenne (6): > dt-bindings: hwlock: add support of shared locks > hwspinlock: allow sharing of hwspinlocks > dt-bindings: hwlock: update STM32 #hwlock-cells value > ARM: dts: stm32: Add hwspinlock node for stm32mp157 SoC > ARM: dts: stm32: Add hwlock for irqchip on stm32mp157 > ARM: dts: stm32: hwlocks for GPIO for stm32mp157 > > .../devicetree/bindings/hwlock/hwlock.txt | 27 +++++-- > .../bindings/hwlock/st,stm32-hwspinlock.txt | 6 +- > Documentation/hwspinlock.txt | 10 ++- > arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 2 + > arch/arm/boot/dts/stm32mp157c.dtsi | 10 +++ > drivers/hwspinlock/hwspinlock_core.c | 82 +++++++++++++++++----- > drivers/hwspinlock/hwspinlock_internal.h | 2 + > 7 files changed, 108 insertions(+), 31 deletions(-) > > -- > 2.7.4 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel