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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id v27sm32080454pgn.76.2019.08.20.14.59.32 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Aug 2019 14:59:32 -0700 (PDT) Date: Tue, 20 Aug 2019 15:59:30 -0600 From: Mathieu Poirier To: Andrew Murray Subject: Re: [PATCH v5 2/3] dt-bindings: arm: coresight: Add support for coresight-loses-context-with-cpu Message-ID: <20190820215930.GB12159@xps15> References: <20190816154615.39854-1-andrew.murray@arm.com> <20190816154615.39854-3-andrew.murray@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20190816154615.39854-3-andrew.murray@arm.com> User-Agent: Mutt/1.9.4 (2018-02-28) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190820_145934_457467_C6EE6012 X-CRM114-Status: GOOD ( 19.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Al.Grant@arm.com, Suzuki K Poulose , Alexander Shishkin , coresight@lists.linaro.org, Sudeep Holla , Leo Yan , linux-arm-kernel@lists.infradead.org, Mike Leach Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Aug 16, 2019 at 04:46:14PM +0100, Andrew Murray wrote: > Some coresight components, because of choices made during hardware > integration, require their state to be saved and restored across CPU low > power states. > > The software has no reliable method of detecting when save/restore is > required thus let's add a binding to inform the kernel. > > Signed-off-by: Andrew Murray > --- > Documentation/devicetree/bindings/arm/coresight.txt | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt > index fcc3bacfd8bc..d02c42d21f2f 100644 > --- a/Documentation/devicetree/bindings/arm/coresight.txt > +++ b/Documentation/devicetree/bindings/arm/coresight.txt > @@ -87,6 +87,15 @@ its hardware characteristcs. > > * port or ports: see "Graph bindings for Coresight" below. > > +* Optional properties for all components: > + > + * arm,coresight-loses-context-with-cpu : boolean. Indicates that the > + hardware will lose register context on CPU power down (e.g. CPUIdle). > + An example of where this may be needed are systems which contain a > + coresight component and CPU in the same power domain. When the CPU > + powers down the coresight component also powers down and loses its > + context. This property is currently only used for the ETM 4.x driver. > + Reviewed-by: Mathieu Poirier When you resend this set make sure to include the device tree mailing list as instructed by get_maintainer.pl. Since this set did not CC the DT list, none of the maintainers over there will look at your patches. > * Optional properties for ETM/PTMs: > > * arm,cp14: must be present if the system accesses ETM/PTM management > -- > 2.21.0 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel