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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id c11sm6726816otr.54.2019.08.21.11.28.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Aug 2019 11:28:58 -0700 (PDT) Date: Wed, 21 Aug 2019 13:28:57 -0500 From: Rob Herring To: Miquel Raynal Subject: Re: [PATCH v3 14/19] dt-bindings: pci: add PHY properties to Armada 7K/8K controller bindings Message-ID: <20190821182857.GA9660@bogus> References: <20190731122126.3049-1-miquel.raynal@bootlin.com> <20190731122126.3049-15-miquel.raynal@bootlin.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20190731122126.3049-15-miquel.raynal@bootlin.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190821_112900_061125_843478F8 X-CRM114-Status: GOOD ( 16.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Lunn , Jason Cooper , devicetree@vger.kernel.org, Antoine Tenart , Grzegorz Jaszczyk , Gregory Clement , Russell King , Kishon Vijay Abraham I , Nadav Haklai , Thomas Petazzoni , Maxime Chevallier , linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Jul 31, 2019 at 02:21:21PM +0200, Miquel Raynal wrote: > Armada CP110 PCIe controller can have from one to four PHYs for > configuring SERDES lanes (PCIe x1, PCIe x2 or PCIe x4). Describe the > phys and phy-names properties in the bindings. > > Signed-off-by: Miquel Raynal > --- > Documentation/devicetree/bindings/pci/pci-armada8k.txt | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/pci-armada8k.txt b/Documentation/devicetree/bindings/pci/pci-armada8k.txt > index 9e3fc15e1af8..7cf12162aa4e 100644 > --- a/Documentation/devicetree/bindings/pci/pci-armada8k.txt > +++ b/Documentation/devicetree/bindings/pci/pci-armada8k.txt > @@ -17,6 +17,12 @@ Required properties: > name must be "core" for the first clock and "reg" for the second > one > > +Optional properties: > +- phys: phandle(s) to PHY node(s) following the generic PHY bindings. > + Either 1, 2 or 4 PHYs might be needed depending on the number of > + PCIe lanes. > +- phy-names: names of the PHYs. You need to enumerate what the names are. Based on your example in v2, I don't think the names are really valuable unless you can skip lanes. Rob _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel