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Rao" Subject: Re: [PATCH v4] arm64: implement KPROBES_ON_FTRACE Thread-Topic: [PATCH v4] arm64: implement KPROBES_ON_FTRACE Thread-Index: AQHVWJwGDRorz/HiOUajlPa5ER0qaKcGu4YAgACzXwD//4bGgIAAAwYA Date: Thu, 22 Aug 2019 10:44:03 +0000 Message-ID: <20190822183254.1bb5576d@xhacker.debian> References: <20190822113421.52920377@xhacker.debian> <1566456155.27ojwy97ss.naveen@linux.ibm.com> <20190822173558.63de3fc4@xhacker.debian> <1566468150.x8u1577wgh.naveen@linux.ibm.com> In-Reply-To: <1566468150.x8u1577wgh.naveen@linux.ibm.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [124.74.246.114] x-clientproxiedby: TY2PR06CA0041.apcprd06.prod.outlook.com (2603:1096:404:2e::29) To BYAPR03MB4773.namprd03.prod.outlook.com (2603:10b6:a03:134::24) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Jisheng.Zhang@synaptics.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: Claws Mail 3.17.3 (GTK+ 2.24.32; x86_64-pc-linux-gnu) x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: c3e8b1e9-091b-4078-a527-08d726eda66e x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(5600166)(711020)(4605104)(1401327)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7193020); SRVR:BYAPR03MB3624; x-ms-traffictypediagnostic: BYAPR03MB3624: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:10000; x-forefront-prvs: 01371B902F x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(366004)(396003)(346002)(39850400004)(136003)(376002)(189003)(199004)(7736002)(26005)(386003)(6506007)(5660300002)(6916009)(86362001)(6436002)(6486002)(478600001)(53936002)(229853002)(4326008)(50226002)(54906003)(8936002)(52116002)(81166006)(8676002)(76176011)(2906002)(99286004)(81156014)(305945005)(25786009)(7416002)(102836004)(316002)(6246003)(476003)(14444005)(6116002)(11346002)(446003)(64756008)(66946007)(66476007)(486006)(256004)(66556008)(186003)(3846002)(66446008)(66066001)(1076003)(14454004)(6512007)(9686003)(71190400001)(71200400001)(39210200001); DIR:OUT; SFP:1101; SCL:1; SRVR:BYAPR03MB3624; H:BYAPR03MB4773.namprd03.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:0; received-spf: None (protection.outlook.com: synaptics.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: cCdIEPXcWL/I/RaCRgBfDcedl/gErQmE8cgbu3UlsSLqd44O2YJAClmSzs6iksqjrw4hjo0LQHg+N1Lc/p8WjGlf2WILgLMqCIP67ggeGAKG57HngLD0PIKiXGpbWUWkHg0jzkM68iE6p09+HUf9Ss3w+FaNS3qp1CyWaM1vYUR8C2OOb0yA7ZCKqsukj5T8Q6xTk1LYvg5WLYXRvlf0g5jKqy2MEH7p9trbOldD6hkgmbJ7q5hwg13M+kwL3CLWlIvbOVatZDHRpZSKaNimtUjyllQVjr7qZFMBPNpQY3m/yEOqaIDaghnCfhFAifQT2VZ7v/Qr0QiE9VjVwYds98+CU/GKN8tSOgkiAlAj0x3JSNzDi4dla69pEyplcXiPjRoVZr3vi2b+sZDz42u5EpM2tjARDgymebfiDCSVOm0= x-ms-exchange-transport-forked: True Content-ID: <52D37053CF07584DA4A594C3BC219B1F@namprd03.prod.outlook.com> MIME-Version: 1.0 X-OriginatorOrg: synaptics.com X-MS-Exchange-CrossTenant-Network-Message-Id: c3e8b1e9-091b-4078-a527-08d726eda66e X-MS-Exchange-CrossTenant-originalarrivaltime: 22 Aug 2019 10:44:03.9547 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 335d1fbc-2124-4173-9863-17e7051a2a0e X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: zQ6hrPj454XE+NovC32VY3InAbwBh1VtPPr9pterPmeuhKdmgLWhpDDFOyPsld4BJITjjUNEDW3xJio9SBpcPA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR03MB3624 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190822_034407_999411_FE21C791 X-CRM114-Status: GOOD ( 21.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , "linux-doc@vger.kernel.org" , Peter Zijlstra , Catalin Marinas , Jonathan Corbet , "linux-kernel@vger.kernel.org" , Steven Rostedt , Ingo Molnar , Masami Hiramatsu , Thomas Gleixner , Will Deacon , "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 22 Aug 2019 15:52:05 +0530 "Naveen N. Rao" wrote: > > > Jisheng Zhang wrote: > > Hi, > > > > On Thu, 22 Aug 2019 12:23:58 +0530 > > "Naveen N. Rao" wrote: > >> Jisheng Zhang wrote: > ... > >> > +/* Ftrace callback handler for kprobes -- called under preepmt > >> > disabed */ > >> > +void kprobe_ftrace_handler(unsigned long ip, unsigned long parent_ip, > >> > + struct ftrace_ops *ops, struct pt_regs *regs) > >> > +{ > >> > + struct kprobe *p; > >> > + struct kprobe_ctlblk *kcb; > >> > + > >> > + /* Preempt is disabled by ftrace */ > >> > + p = get_kprobe((kprobe_opcode_t *)ip); > >> > + if (unlikely(!p) || kprobe_disabled(p)) > >> > + return; > >> > + > >> > + kcb = get_kprobe_ctlblk(); > >> > + if (kprobe_running()) { > >> > + kprobes_inc_nmissed_count(p); > >> > + } else { > >> > + unsigned long orig_ip = instruction_pointer(regs); > >> > + /* Kprobe handler expects regs->pc = pc + 4 as breakpoint hit */ > >> > + instruction_pointer_set(regs, ip + sizeof(kprobe_opcode_t)); > >> > >> Just want to make sure that you've confirmed that this is what happens > >> with a regular trap/brk based kprobe on ARM64. The reason for setting > >> the instruction pointer here is to ensure that it is set to the same > >> value as would be set if there was a trap/brk instruction at the ftrace > >> location. This ensures that the kprobe pre handler sees the same value > >> regardless. > > > > Due to the arm64's DYNAMIC_FTRACE_WITH_REGS implementation, the code itself > > is correct. But this doesn't look like "there was a trap instruction at > > the ftrace location". > > > > W/O KPROBE_ON_FTRACE: > > > > foo: > > 00 insA > > 04 insB > > 08 insC > > > > kprobe's pre_handler() will see pc points to 00. > > In this case, the probe will be placed at foo+0x00, so pre_handler() > seeing that address in pt_regs is correct behavior - as long as arm64 > 'brk' instruction causes an exception with the instruction pointer set Yep, confirmed with regular trap/brk based kprobes, I do see PC set to the "brk" instruction. > *to* the 'brk' instruction. This is similar to how powerpc 'trap' works. > However, x86 'int3' causes an exception *after* execution of the > instruction. Got it. I understand where's the comment "expects regs->pc = pc + 1" from. > > > > > W/ KPROBE_ON_FTRACE: > > > > foo: > > 00 lr saver > > 04 nop // will be modified to ftrace call ins when KPROBE is armed > > 08 insA > > 0c insB > > In this case, if user asks for a probe to be placed at 'foo', we will > choose foo+0x04 and from that point on, the behavior should reflect that > a kprobe was placed at foo+0x04. In particular, the pre_handler() should > see foo+0x04 in pt_regs. The post_handler() would then see foo+0x08. > > > > > later, kprobe_ftrace_handler() will see pc points to 04, so pc + 4 will > > point to 08 the same as the one w/o KPROBE_ON_FTRACE. > > I didn't mean to compare regular trap/brk based kprobes with > KPROBES_ON_FTRACE. The only important aspect is that the handlers see > consistent pt_regs in both cases, depending on where the kprobe was > placed. Choosing a different address/offset to place a kprobe during its > registration is an orthogonal aspect. Indeed, previously, I want to let the PC point to the same instruction, it seems I misunderstood the "consistent" meaning. > > > > > It seems I need to fix the comment. > > Given your explanation above, I think you can simply drop the first > adjustment to the instruction pointer before the pre handler invocation. > The rest of the code looks fine. > > Yep, thanks a lot. Will send out a new version soon. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel