From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Rob Herring <robh@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, alsa-devel@alsa-project.org,
Takashi Iwai <tiwai@suse.com>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>,
alexandre@bootlin.com,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Jaroslav Kysela <perex@perex.cz>,
Michal Simek <michal.simek@xilinx.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/3] dt-bindings: sound: Add Xilinx logicPD-I2S FPGA IP bindings
Date: Mon, 2 Sep 2019 15:51:13 +0200 [thread overview]
Message-ID: <20190902155113.40b00fa0@xps13> (raw)
In-Reply-To: <20190902044231.GA17348@bogus>
Hi Rob,
Thanks for the review, one question below.
Rob Herring <robh@kernel.org> wrote on Mon, 02 Sep 2019 14:39:09 +0100:
> On Fri, Aug 30, 2019 at 11:06:06PM +0200, Miquel Raynal wrote:
> > Document the logicPD I2S FPGA block bindings in yaml.
> >
> > Syntax verified with dt-doc-validate.
> >
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > ---
> > .../bindings/sound/xlnx,logicpd-i2s.yaml | 57 +++++++++++++++++++
> > 1 file changed, 57 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/sound/xlnx,logicpd-i2s.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/sound/xlnx,logicpd-i2s.yaml b/Documentation/devicetree/bindings/sound/xlnx,logicpd-i2s.yaml
> > new file mode 100644
> > index 000000000000..cbff641af199
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/sound/xlnx,logicpd-i2s.yaml
> > @@ -0,0 +1,57 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/sound/xlnx,logicpd-i2s.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Device-Tree bindings for Xilinx logicPD I2S FPGA block
> > +
> > +maintainers:
> > + - Miquel Raynal <miquel.raynal@bootlin.com>
> > +
> > +description: |
> > + The IP supports I2S playback/capture audio. It acts as a slave and
> > + clocks should come from the codec. It only supports two channels and
> > + S16_LE format.
> > +
> > +properties:
> > + compatible:
> > + items:
> > + - const: xlnx,logicpd-i2s
> > +
> > + reg:
> > + maxItems: 1
> > + description:
> > + Base address and size of the IP core instance.
> > +
> > + interrupts:
> > + minItems: 1
> > + maxItems: 2
> > + items:
> > + - description: tx interrupt
> > + - description: rx interrupt
> > + description:
> > + Either the Tx interruption or the Rx interruption or both.
>
> The schema says either tx or both. Doesn't really matter here as it's
> just numbers.
I see , I'll drop the 'items' entry.
>
> > +
> > + interrupt-names:
> > + minItems: 1
> > + maxItems: 2
> > + items:
> > + - const: tx
> > + - const: rx
>
> But here it does matter.
>
> The easiest way to express this is:
>
> oneOf:
> - items:
> - enum: [ tx, rx ]
> - items:
> - const: tx
> - const: rx
>
Does this enforce an order? (I don't know if it matters, though, but in
the bellow example I put the Rx interrupt first).
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - interrupts
> > + - interrupts-controller
> > +
> > +examples:
> > + - |
> > + logii2s_dai: logii2s-dai@43c10000 {
> > + reg = <0x43c10000 0x1000>;
> > + compatible = "xlnx,logicpd-i2s-dai";
> > + interrupt-parent = <&intc>;
> > + interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>, <0 30 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-names = "rx", "tx";
> > + };
> > --
> > 2.20.1
> >
>
Thanks,
Miquèl
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next prev parent reply other threads:[~2019-09-02 13:51 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-30 21:06 [PATCH 1/3] ASoC: xlnx: add Xilinx logicPD-I2S FPGA IP support Miquel Raynal
2019-08-30 21:06 ` [PATCH 2/3] dt-bindings: sound: Add Xilinx logicPD-I2S FPGA IP bindings Miquel Raynal
2019-09-02 13:39 ` Rob Herring
2019-09-02 13:51 ` Miquel Raynal [this message]
2019-09-02 14:24 ` Rob Herring
2019-08-30 21:06 ` [PATCH 3/3] MAINTAINERS: Add an entry for the Xilinx logicPD-I2S block Miquel Raynal
2019-09-02 7:39 ` [PATCH 1/3] ASoC: xlnx: add Xilinx logicPD-I2S FPGA IP support Michal Simek
2019-09-02 20:21 ` Miquel Raynal
2019-09-03 6:51 ` Michal Simek
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