* [PATCH 1/3] OMAP3: PM: Set/clear T2 bit for Smartreflex on TWL [not found] <20190801012823.28730-1-neolynx@gmail.com> @ 2019-08-01 1:28 ` André Roth 2019-09-12 18:59 ` Adam Ford 0 siblings, 1 reply; 5+ messages in thread From: André Roth @ 2019-08-01 1:28 UTC (permalink / raw) To: linux-omap Cc: Nishanth Menon, Kevin Hilman, Thara Gopinath, Shweta Gulati, linux-arm-kernel From: Thara Gopinath <thara@ti.com> Voltage control on TWL can be done using VMODE/I2C1/I2C_SR. Since almost all platforms use I2C_SR on omap3, omap3_twl_init by default expects that OMAP's I2C_SR is plugged in to TWL's I2C and calls omap3_twl_set_sr_bit. On platforms where I2C_SR is not connected, the board files are expected to call omap3_twl_set_sr_bit(false) to ensure that I2C_SR path is not set for voltage control and prevent the default behavior of omap3_twl_init. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Thara Gopinath <thara@ti.com> Signed-off-by: Shweta Gulati <shweta.gulati@ti.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Kevin Hilman <khilman@ti.com> --- arch/arm/mach-omap2/omap_twl.c | 60 ++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c index 6787f1e72c6b..1dae906128c2 100644 --- a/arch/arm/mach-omap2/omap_twl.c +++ b/arch/arm/mach-omap2/omap_twl.c @@ -43,8 +43,15 @@ static bool is_offset_valid; static u8 smps_offset; +/* + * Flag to ensure Smartreflex bit in TWL + * being cleared in board file is not overwritten. + */ +static bool __initdata twl_sr_enable_autoinit; +#define TWL4030_DCDC_GLOBAL_CFG 0x06 #define REG_SMPS_OFFSET 0xE0 +#define SMARTREFLEX_ENABLE BIT(3) static unsigned long twl4030_vsel_to_uv(const u8 vsel) { @@ -241,6 +248,18 @@ int __init omap3_twl_init(void) if (!cpu_is_omap34xx()) return -ENODEV; + /* + * The smartreflex bit on twl4030 specifies if the setting of voltage + * is done over the I2C_SR path. Since this setting is independent of + * the actual usage of smartreflex AVS module, we enable TWL SR bit + * by default irrespective of whether smartreflex AVS module is enabled + * on the OMAP side or not. This is because without this bit enabled, + * the voltage scaling through vp forceupdate/bypass mechanism of + * voltage scaling will not function on TWL over I2C_SR. + */ + if (!twl_sr_enable_autoinit) + omap3_twl_set_sr_bit(true); + voltdm = voltdm_lookup("mpu_iva"); omap_voltage_register_pmic(voltdm, &omap3_mpu_pmic); @@ -249,3 +268,44 @@ int __init omap3_twl_init(void) return 0; } + +/** + * omap3_twl_set_sr_bit() - Set/Clear SR bit on TWL + * @enable: enable SR mode in twl or not + * + * If 'enable' is true, enables Smartreflex bit on TWL 4030 to make sure + * voltage scaling through OMAP SR works. Else, the smartreflex bit + * on twl4030 is cleared as there are platforms which use OMAP3 and T2 but + * use Synchronized Scaling Hardware Strategy (ENABLE_VMODE=1) and Direct + * Strategy Software Scaling Mode (ENABLE_VMODE=0), for setting the voltages, + * in those scenarios this bit is to be cleared (enable = false). + * + * Returns 0 on sucess, error is returned if I2C read/write fails. + */ +int __init omap3_twl_set_sr_bit(bool enable) +{ + u8 temp; + int ret; + if (twl_sr_enable_autoinit) + pr_warning("%s: unexpected multiple calls\n", __func__); + + ret = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &temp, + TWL4030_DCDC_GLOBAL_CFG); + if (ret) + goto err; + + if (enable) + temp |= SMARTREFLEX_ENABLE; + else + temp &= ~SMARTREFLEX_ENABLE; + + ret = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, temp, + TWL4030_DCDC_GLOBAL_CFG); + if (!ret) { + twl_sr_enable_autoinit = true; + return 0; + } +err: + pr_err("%s: Error access to TWL4030 (%d)\n", __func__, ret); + return ret; +} -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/3] OMAP3: PM: Set/clear T2 bit for Smartreflex on TWL 2019-08-01 1:28 ` [PATCH 1/3] OMAP3: PM: Set/clear T2 bit for Smartreflex on TWL André Roth @ 2019-09-12 18:59 ` Adam Ford 2019-09-12 21:09 ` Tony Lindgren 0 siblings, 1 reply; 5+ messages in thread From: Adam Ford @ 2019-09-12 18:59 UTC (permalink / raw) To: André Roth Cc: Nishanth Menon, Kevin Hilman, Tony Lindgren, H. Nikolaus Schaller, Shweta Gulati, Thara Gopinath, Linux-OMAP, arm-soc On Wed, Jul 31, 2019 at 8:29 PM André Roth <neolynx@gmail.com> wrote: > > From: Thara Gopinath <thara@ti.com> > > Voltage control on TWL can be done using VMODE/I2C1/I2C_SR. > Since almost all platforms use I2C_SR on omap3, omap3_twl_init by > default expects that OMAP's I2C_SR is plugged in to TWL's I2C > and calls omap3_twl_set_sr_bit. On platforms where I2C_SR is not connected, > the board files are expected to call omap3_twl_set_sr_bit(false) to > ensure that I2C_SR path is not set for voltage control and prevent > the default behavior of omap3_twl_init. > > Signed-off-by: Nishanth Menon <nm@ti.com> > Signed-off-by: Thara Gopinath <thara@ti.com> > Signed-off-by: Shweta Gulati <shweta.gulati@ti.com> > Cc: linux-arm-kernel@lists.infradead.org > Signed-off-by: Kevin Hilman <khilman@ti.com> Tony, Is there a status update on this series? It's been several months, and I haven't seen any feedback on it, nor does it appear to be in any of your branches that I can see. adam > --- > arch/arm/mach-omap2/omap_twl.c | 60 ++++++++++++++++++++++++++++++++++ > 1 file changed, 60 insertions(+) > > diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c > index 6787f1e72c6b..1dae906128c2 100644 > --- a/arch/arm/mach-omap2/omap_twl.c > +++ b/arch/arm/mach-omap2/omap_twl.c > @@ -43,8 +43,15 @@ > > static bool is_offset_valid; > static u8 smps_offset; > +/* > + * Flag to ensure Smartreflex bit in TWL > + * being cleared in board file is not overwritten. > + */ > +static bool __initdata twl_sr_enable_autoinit; > > +#define TWL4030_DCDC_GLOBAL_CFG 0x06 > #define REG_SMPS_OFFSET 0xE0 > +#define SMARTREFLEX_ENABLE BIT(3) > > static unsigned long twl4030_vsel_to_uv(const u8 vsel) > { > @@ -241,6 +248,18 @@ int __init omap3_twl_init(void) > if (!cpu_is_omap34xx()) > return -ENODEV; > > + /* > + * The smartreflex bit on twl4030 specifies if the setting of voltage > + * is done over the I2C_SR path. Since this setting is independent of > + * the actual usage of smartreflex AVS module, we enable TWL SR bit > + * by default irrespective of whether smartreflex AVS module is enabled > + * on the OMAP side or not. This is because without this bit enabled, > + * the voltage scaling through vp forceupdate/bypass mechanism of > + * voltage scaling will not function on TWL over I2C_SR. > + */ > + if (!twl_sr_enable_autoinit) > + omap3_twl_set_sr_bit(true); > + > voltdm = voltdm_lookup("mpu_iva"); > omap_voltage_register_pmic(voltdm, &omap3_mpu_pmic); > > @@ -249,3 +268,44 @@ int __init omap3_twl_init(void) > > return 0; > } > + > +/** > + * omap3_twl_set_sr_bit() - Set/Clear SR bit on TWL > + * @enable: enable SR mode in twl or not > + * > + * If 'enable' is true, enables Smartreflex bit on TWL 4030 to make sure > + * voltage scaling through OMAP SR works. Else, the smartreflex bit > + * on twl4030 is cleared as there are platforms which use OMAP3 and T2 but > + * use Synchronized Scaling Hardware Strategy (ENABLE_VMODE=1) and Direct > + * Strategy Software Scaling Mode (ENABLE_VMODE=0), for setting the voltages, > + * in those scenarios this bit is to be cleared (enable = false). > + * > + * Returns 0 on sucess, error is returned if I2C read/write fails. > + */ > +int __init omap3_twl_set_sr_bit(bool enable) > +{ > + u8 temp; > + int ret; > + if (twl_sr_enable_autoinit) > + pr_warning("%s: unexpected multiple calls\n", __func__); > + > + ret = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &temp, > + TWL4030_DCDC_GLOBAL_CFG); > + if (ret) > + goto err; > + > + if (enable) > + temp |= SMARTREFLEX_ENABLE; > + else > + temp &= ~SMARTREFLEX_ENABLE; > + > + ret = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, temp, > + TWL4030_DCDC_GLOBAL_CFG); > + if (!ret) { > + twl_sr_enable_autoinit = true; > + return 0; > + } > +err: > + pr_err("%s: Error access to TWL4030 (%d)\n", __func__, ret); > + return ret; > +} > -- > 2.17.1 > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/3] OMAP3: PM: Set/clear T2 bit for Smartreflex on TWL 2019-09-12 18:59 ` Adam Ford @ 2019-09-12 21:09 ` Tony Lindgren 2019-09-13 15:11 ` Adam Ford 0 siblings, 1 reply; 5+ messages in thread From: Tony Lindgren @ 2019-09-12 21:09 UTC (permalink / raw) To: Adam Ford Cc: Nishanth Menon, Kevin Hilman, H. Nikolaus Schaller, Shweta Gulati, André Roth, Thara Gopinath, Linux-OMAP, arm-soc * Adam Ford <aford173@gmail.com> [190912 19:00]: > On Wed, Jul 31, 2019 at 8:29 PM André Roth <neolynx@gmail.com> wrote: > > > > From: Thara Gopinath <thara@ti.com> > > > > Voltage control on TWL can be done using VMODE/I2C1/I2C_SR. > > Since almost all platforms use I2C_SR on omap3, omap3_twl_init by > > default expects that OMAP's I2C_SR is plugged in to TWL's I2C > > and calls omap3_twl_set_sr_bit. On platforms where I2C_SR is not connected, > > the board files are expected to call omap3_twl_set_sr_bit(false) to > > ensure that I2C_SR path is not set for voltage control and prevent > > the default behavior of omap3_twl_init. > > > > Signed-off-by: Nishanth Menon <nm@ti.com> > > Signed-off-by: Thara Gopinath <thara@ti.com> > > Signed-off-by: Shweta Gulati <shweta.gulati@ti.com> > > Cc: linux-arm-kernel@lists.infradead.org > > Signed-off-by: Kevin Hilman <khilman@ti.com> > > Tony, > > Is there a status update on this series? It's been several months, > and I haven't seen any feedback on it, nor does it appear to be in any > of your branches that I can see. Well it was tagged RFC.. Does something need updating with it? At least the first two patches looked OK to me. Regards, Tony _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/3] OMAP3: PM: Set/clear T2 bit for Smartreflex on TWL 2019-09-12 21:09 ` Tony Lindgren @ 2019-09-13 15:11 ` Adam Ford 0 siblings, 0 replies; 5+ messages in thread From: Adam Ford @ 2019-09-13 15:11 UTC (permalink / raw) To: Tony Lindgren Cc: Nishanth Menon, Kevin Hilman, H. Nikolaus Schaller, Shweta Gulati, André Roth, Thara Gopinath, Linux-OMAP, arm-soc On Thu, Sep 12, 2019 at 4:09 PM Tony Lindgren <tony@atomide.com> wrote: > > * Adam Ford <aford173@gmail.com> [190912 19:00]: > > On Wed, Jul 31, 2019 at 8:29 PM André Roth <neolynx@gmail.com> wrote: > > > > > > From: Thara Gopinath <thara@ti.com> > > > > > > Voltage control on TWL can be done using VMODE/I2C1/I2C_SR. > > > Since almost all platforms use I2C_SR on omap3, omap3_twl_init by > > > default expects that OMAP's I2C_SR is plugged in to TWL's I2C > > > and calls omap3_twl_set_sr_bit. On platforms where I2C_SR is not connected, > > > the board files are expected to call omap3_twl_set_sr_bit(false) to > > > ensure that I2C_SR path is not set for voltage control and prevent > > > the default behavior of omap3_twl_init. > > > > > > Signed-off-by: Nishanth Menon <nm@ti.com> > > > Signed-off-by: Thara Gopinath <thara@ti.com> > > > Signed-off-by: Shweta Gulati <shweta.gulati@ti.com> > > > Cc: linux-arm-kernel@lists.infradead.org > > > Signed-off-by: Kevin Hilman <khilman@ti.com> > > > > Tony, > > > > Is there a status update on this series? It's been several months, > > and I haven't seen any feedback on it, nor does it appear to be in any > > of your branches that I can see. > > Well it was tagged RFC.. Does something need updating > with it? I didn't notice the RTC until you pointed out the 0/3 file showed the RFC. Andre - since you have sign-off by various TI people and Tony seems satisfied, would you be will to re-base and push the patch series without the RFC? I think some of the work that H Nikolaus Schaller is doing will benefit from this. Thank you, adam > > At least the first two patches looked OK to me. > > Regards, > > Tony _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 5+ messages in thread
[parent not found: <20190801010450.27863-1-neolynx@gmail.com>]
* [PATCH 1/3] OMAP3: PM: Set/clear T2 bit for Smartreflex on TWL [not found] <20190801010450.27863-1-neolynx@gmail.com> @ 2019-08-01 1:04 ` André Roth 0 siblings, 0 replies; 5+ messages in thread From: André Roth @ 2019-08-01 1:04 UTC (permalink / raw) To: neolynx Cc: Nishanth Menon, Kevin Hilman, Thara Gopinath, Shweta Gulati, linux-arm-kernel From: Thara Gopinath <thara@ti.com> Voltage control on TWL can be done using VMODE/I2C1/I2C_SR. Since almost all platforms use I2C_SR on omap3, omap3_twl_init by default expects that OMAP's I2C_SR is plugged in to TWL's I2C and calls omap3_twl_set_sr_bit. On platforms where I2C_SR is not connected, the board files are expected to call omap3_twl_set_sr_bit(false) to ensure that I2C_SR path is not set for voltage control and prevent the default behavior of omap3_twl_init. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Thara Gopinath <thara@ti.com> Signed-off-by: Shweta Gulati <shweta.gulati@ti.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Kevin Hilman <khilman@ti.com> --- arch/arm/mach-omap2/omap_twl.c | 60 ++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c index 6787f1e72c6b..1dae906128c2 100644 --- a/arch/arm/mach-omap2/omap_twl.c +++ b/arch/arm/mach-omap2/omap_twl.c @@ -43,8 +43,15 @@ static bool is_offset_valid; static u8 smps_offset; +/* + * Flag to ensure Smartreflex bit in TWL + * being cleared in board file is not overwritten. + */ +static bool __initdata twl_sr_enable_autoinit; +#define TWL4030_DCDC_GLOBAL_CFG 0x06 #define REG_SMPS_OFFSET 0xE0 +#define SMARTREFLEX_ENABLE BIT(3) static unsigned long twl4030_vsel_to_uv(const u8 vsel) { @@ -241,6 +248,18 @@ int __init omap3_twl_init(void) if (!cpu_is_omap34xx()) return -ENODEV; + /* + * The smartreflex bit on twl4030 specifies if the setting of voltage + * is done over the I2C_SR path. Since this setting is independent of + * the actual usage of smartreflex AVS module, we enable TWL SR bit + * by default irrespective of whether smartreflex AVS module is enabled + * on the OMAP side or not. This is because without this bit enabled, + * the voltage scaling through vp forceupdate/bypass mechanism of + * voltage scaling will not function on TWL over I2C_SR. + */ + if (!twl_sr_enable_autoinit) + omap3_twl_set_sr_bit(true); + voltdm = voltdm_lookup("mpu_iva"); omap_voltage_register_pmic(voltdm, &omap3_mpu_pmic); @@ -249,3 +268,44 @@ int __init omap3_twl_init(void) return 0; } + +/** + * omap3_twl_set_sr_bit() - Set/Clear SR bit on TWL + * @enable: enable SR mode in twl or not + * + * If 'enable' is true, enables Smartreflex bit on TWL 4030 to make sure + * voltage scaling through OMAP SR works. Else, the smartreflex bit + * on twl4030 is cleared as there are platforms which use OMAP3 and T2 but + * use Synchronized Scaling Hardware Strategy (ENABLE_VMODE=1) and Direct + * Strategy Software Scaling Mode (ENABLE_VMODE=0), for setting the voltages, + * in those scenarios this bit is to be cleared (enable = false). + * + * Returns 0 on sucess, error is returned if I2C read/write fails. + */ +int __init omap3_twl_set_sr_bit(bool enable) +{ + u8 temp; + int ret; + if (twl_sr_enable_autoinit) + pr_warning("%s: unexpected multiple calls\n", __func__); + + ret = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &temp, + TWL4030_DCDC_GLOBAL_CFG); + if (ret) + goto err; + + if (enable) + temp |= SMARTREFLEX_ENABLE; + else + temp &= ~SMARTREFLEX_ENABLE; + + ret = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, temp, + TWL4030_DCDC_GLOBAL_CFG); + if (!ret) { + twl_sr_enable_autoinit = true; + return 0; + } +err: + pr_err("%s: Error access to TWL4030 (%d)\n", __func__, ret); + return ret; +} -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 5+ messages in thread
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2019-08-01 1:28 ` [PATCH 1/3] OMAP3: PM: Set/clear T2 bit for Smartreflex on TWL André Roth
2019-09-12 18:59 ` Adam Ford
2019-09-12 21:09 ` Tony Lindgren
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