From: Stephen Boyd <sboyd@kernel.org>
To: Eugen.Hristev@microchip.com, alexandre.belloni@bootlin.com,
linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, mturquette@baylibre.com
Cc: Eugen.Hristev@microchip.com, Ludovic.Desroches@microchip.com
Subject: Re: [PATCH 2/2] clk: at91: select parent if main oscillator or bypass is enabled
Date: Mon, 16 Sep 2019 13:15:46 -0700 [thread overview]
Message-ID: <20190916201547.5AF9020665@mail.kernel.org> (raw)
In-Reply-To: <1568042692-11784-2-git-send-email-eugen.hristev@microchip.com>
Quoting Eugen.Hristev@microchip.com (2019-09-09 08:30:34)
> From: Eugen Hristev <eugen.hristev@microchip.com>
>
> Selecting the right parent for the main clock is done using only
> main oscillator enabled bit.
> In case we have this oscillator bypassed by an external signal (no driving
> on the XOUT line), we still use external clock, but with BYPASS bit set.
> So, in this case we must select the same parent as before.
> Create a macro that will select the right parent considering both bits from
> the MOR register.
> Use this macro when looking for the right parent.
>
> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
> ---
Applied to clk-next
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next prev parent reply other threads:[~2019-09-16 20:16 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-09 15:30 [PATCH 1/2] clk: at91: fix update bit maps on CFG_MOR write Eugen.Hristev
2019-09-09 15:30 ` [PATCH 2/2] clk: at91: select parent if main oscillator or bypass is enabled Eugen.Hristev
2019-09-11 12:21 ` Alexandre Belloni
2019-09-16 5:25 ` Claudiu.Beznea
2019-09-16 20:15 ` Stephen Boyd [this message]
2019-09-10 15:16 ` [PATCH 1/2] clk: at91: fix update bit maps on CFG_MOR write Alexandre Belloni
2019-09-16 5:24 ` Claudiu.Beznea
2019-09-16 20:15 ` Stephen Boyd
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