From: Rob Herring <robh@kernel.org>
To: Manish Narani <manish.narani@xilinx.com>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
ulf.hansson@linaro.org, rajan.vaja@xilinx.com,
nava.manne@xilinx.com, linux-mmc@vger.kernel.org,
adrian.hunter@intel.com, michal.simek@xilinx.com, mdf@kernel.org,
linux-arm-kernel@lists.infradead.org, jolly.shah@xilinx.com,
linux-kernel@vger.kernel.org, git@xilinx.com
Subject: Re: [PATCH v3 4/8] dt-bindings: mmc: arasan: Add optional properties for Arasan SDHCI
Date: Thu, 17 Oct 2019 13:22:55 -0500 [thread overview]
Message-ID: <20191017182255.GA7053@bogus> (raw)
In-Reply-To: <1571293310-92563-5-git-send-email-manish.narani@xilinx.com>
On Thu, Oct 17, 2019 at 11:51:46AM +0530, Manish Narani wrote:
> Add optional propeties for Arasan SDHCI which are used to set clk delays
properties
> for different speed modes in the controller.
>
> Signed-off-by: Manish Narani <manish.narani@xilinx.com>
> ---
> .../devicetree/bindings/mmc/arasan,sdhci.txt | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
> index b51e40b2e0c5..e0369dd7fb18 100644
> --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
> +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
> @@ -46,6 +46,21 @@ Optional Properties:
> properly. Test mode can be used to force the controller to function.
> - xlnx,int-clock-stable-broken: when present, the controller always reports
> that the internal clock is stable even when it is not.
> + - clk-phase-legacy: Input/Output Clock Delay pair in degrees for Legacy Mode.
> + - clk-phase-mmc-hs: Input/Output Clock Delay pair degrees for MMC HS.
> + - clk-phase-sd-hs: Input/Output Clock Delay pair in degrees for SD HS.
> + - clk-phase-uhs-sdr12: Input/Output Clock Delay pair in degrees for SDR12.
> + - clk-phase-uhs-sdr25: Input/Output Clock Delay pair in degrees for SDR25.
> + - clk-phase-uhs-sdr50: Input/Output Clock Delay pair in degrees for SDR50.
> + - clk-phase-uhs-sdr104: Input/Output Clock Delay pair in degrees for SDR104.
> + - clk-phase-uhs-ddr50: Input/Output Clock Delay pair in degrees for SD DDR50.
> + - clk-phase-mmc-ddr52: Input/Output Clock Delay pair in degrees for MMC DDR52.
> + - clk-phase-mmc-hs200: Input/Output Clock Delay pair in degrees for MMC HS200.
> + - clk-phase-mmc-hs400: Input/Output Clock Delay pair in degrees for MMC HS400.
Should be common?
Range of values?
> +
> + Above mentioned are the clock (phase) delays which are to be configured in the
> + controller while switching to particular speed mode. If not specified, driver
> + will configure the default value defined for particular mode in it.
>
> Example:
> sdhci@e0100000 {
> --
> 2.17.1
>
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next prev parent reply other threads:[~2019-10-17 18:23 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-17 6:21 [PATCH v3 0/8] Arasan SDHCI enhancements and ZynqMP Tap Delays Handling Manish Narani
2019-10-17 6:21 ` [PATCH v3 1/8] mmc: sdhci-of-arasan: Separate out clk related data to another structure Manish Narani
2019-10-17 6:21 ` [PATCH v3 2/8] dt-bindings: mmc: arasan: Update Documentation for the input clock Manish Narani
2019-10-17 18:19 ` Rob Herring
2019-10-17 6:21 ` [PATCH v3 3/8] mmc: sdhci-of-arasan: Add sampling clock for a phy to use Manish Narani
2019-10-17 6:21 ` [PATCH v3 4/8] dt-bindings: mmc: arasan: Add optional properties for Arasan SDHCI Manish Narani
2019-10-17 18:22 ` Rob Herring [this message]
2019-10-18 9:05 ` Manish Narani
2019-10-17 6:21 ` [PATCH v3 5/8] mmc: sdhci-of-arasan: Add support to set clock phase delays for SD Manish Narani
2019-10-17 6:21 ` [PATCH v3 6/8] firmware: xilinx: Add SDIO Tap Delay nodes Manish Narani
2019-10-17 6:21 ` [PATCH v3 7/8] dt-bindings: mmc: arasan: Document 'xlnx, zynqmp-8.9a' controller Manish Narani
2019-10-17 6:21 ` [PATCH v3 8/8] mmc: sdhci-of-arasan: Add support for ZynqMP Platform Tap Delays Setup Manish Narani
2019-10-21 14:14 ` [PATCH v3 0/8] Arasan SDHCI enhancements and ZynqMP Tap Delays Handling Ulf Hansson
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