From: Shawn Guo <shawnguo@kernel.org>
To: Leonard Crestez <leonard.crestez@nxp.com>,
Stephen Boyd <sboyd@kernel.org>
Cc: Dong Aisheng <aisheng.dong@nxp.com>, Jacky Bai <ping.bai@nxp.com>,
Anson Huang <Anson.Huang@nxp.com>,
Michael Turquette <mturquette@baylibre.com>,
linux-imx@nxp.com, kernel@pengutronix.de,
Fabio Estevam <fabio.estevam@nxp.com>,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Abel Vesa <abel.vesa@nxp.com>
Subject: Re: [PATCH] clk: imx8m: Use SYS_PLL1_800M as intermediate parent of CLK_ARM
Date: Mon, 28 Oct 2019 16:35:40 +0800 [thread overview]
Message-ID: <20191028083539.GT16985@dragon> (raw)
In-Reply-To: <f5d2b9c53f1ed5ccb1dd3c6624f56759d92e1689.1571771777.git.leonard.crestez@nxp.com>
On Tue, Oct 22, 2019 at 10:21:28PM +0300, Leonard Crestez wrote:
> During cpu frequency switching the main "CLK_ARM" is reparented to an
> intermediate "step" clock. On imx8mm and imx8mn the 24M oscillator is
> used for this purpose but it is extremely slow, increasing wakeup
> latencies to the point that i2c transactions can timeout and system
> becomes unresponsive.
>
> Fix by switching the "step" clk to SYS_PLL1_800M, matching the behavior
> of imx8m cpufreq drivers in imx vendor tree.
>
> This bug was not immediately apparent because upstream arm64 defconfig
> uses the "performance" governor by default so no cpufreq transitions
> happen.
>
> Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm")
> Fixes: 96d6392b54db ("clk: imx: Add support for i.MX8MN clock driver")
>
> Cc: stable@vger.kernel.org
> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Stephen,
I assume that you will pick up this one as a fix.
Shawn
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next prev parent reply other threads:[~2019-10-28 8:36 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-22 19:21 [PATCH] clk: imx8m: Use SYS_PLL1_800M as intermediate parent of CLK_ARM Leonard Crestez
2019-10-28 8:35 ` Shawn Guo [this message]
2019-10-28 9:45 ` Stephen Boyd
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