From: Maxime Ripard <mripard@kernel.org>
To: Ondrej Jirman <megous@megous.com>
Cc: "open list:ALLWINNER CPUFREQ DRIVER" <linux-pm@vger.kernel.org>,
Yangtao Li <tiny.windzz@gmail.com>,
Viresh Kumar <viresh.kumar@linaro.org>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Chen-Yu Tsai <wens@csie.org>,
open list <linux-kernel@vger.kernel.org>,
linux-sunxi@googlegroups.com,
"moderated list:ARM/Allwinner sunXi SoC support"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH] cpufreq: sun50i: Fix CPU speed bin detection
Date: Fri, 1 Nov 2019 16:07:01 +0100 [thread overview]
Message-ID: <20191101150701.fgke7hoad5zn3vn2@hendrix> (raw)
In-Reply-To: <20191031181359.282617-1-megous@megous.com>
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On Thu, Oct 31, 2019 at 07:13:58PM +0100, Ondrej Jirman wrote:
> I have failures to boot on Orange Pi 3, because this driver determined
> that my SoC is from the normal bin, but my SoC only works reliably with
> the OPP values for the slowest bin.
>
> Looking at BSP code, I found that efuse values have following meanings
> on H6:
>
> - 0b000 invalid (interpreted in vendor's BSP as normal bin)
> - 0b001 slowest bin
> - 0b011 normal bin
> - 0b111 fastest bin
>
> Let's play it safe and interpret 0 as the slowest bin, but fix detection
> of other bins to match vendor code.
>
> Fixes: f328584f7bff ("cpufreq: Add sun50i nvmem based CPU scaling driver")
> Signed-off-by: Ondrej Jirman <megous@megous.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Out of curiosity, which OPP table is being used? I guess it's one of
the dozens of patches sitting there...
Maxime
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next prev parent reply other threads:[~2019-11-01 15:49 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-31 18:13 [PATCH] cpufreq: sun50i: Fix CPU speed bin detection Ondrej Jirman
2019-10-31 18:55 ` [linux-sunxi] " Clément Péron
2019-10-31 19:12 ` Ondřej Jirman
2019-11-01 16:14 ` Ondřej Jirman
2019-11-01 15:07 ` Maxime Ripard [this message]
2019-11-01 16:01 ` Ondřej Jirman
2019-11-01 16:15 ` Ondřej Jirman
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