From: Will Deacon <will@kernel.org>
To: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: "mark.rutland@arm.com" <mark.rutland@arm.com>,
Frank Li <frank.li@nxp.com>,
"robin.murphy@arm.com" <robin.murphy@arm.com>,
dl-linux-imx <linux-imx@nxp.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH V3 3/4] perf/imx_ddr: Add enhanced AXI ID filter support
Date: Mon, 4 Nov 2019 12:32:26 +0000 [thread overview]
Message-ID: <20191104123226.GA24108@willie-the-truck> (raw)
In-Reply-To: <DB7PR04MB4618F9CF365DB9EF35DE40EFE67F0@DB7PR04MB4618.eurprd04.prod.outlook.com>
On Mon, Nov 04, 2019 at 01:21:51AM +0000, Joakim Zhang wrote:
>
> > -----Original Message-----
> > From: Will Deacon <will@kernel.org>
> > Sent: 2019年11月1日 23:17
> > To: Joakim Zhang <qiangqing.zhang@nxp.com>
> > Cc: mark.rutland@arm.com; robin.murphy@arm.com; dl-linux-imx
> > <linux-imx@nxp.com>; Frank Li <frank.li@nxp.com>;
> > linux-arm-kernel@lists.infradead.org
> > Subject: Re: [PATCH V3 3/4] perf/imx_ddr: Add enhanced AXI ID filter support
> >
> > On Fri, Nov 01, 2019 at 08:36:16AM +0000, Joakim Zhang wrote:
> > > With DDR_CAP_AXI_ID_FILTER quirk, indicating HW supports AXI ID filter
> > > which only can get bursts from DDR transaction, i.e. DDR read/write
> > > requests.
> > >
> > > This patch add DDR_CAP_AXI_ID_ENHANCED_FILTER quirk, indicating HW
> > > supports AXI ID filter which can get bursts and bytes from DDR
> > > transaction at the same time. We hope PMU always return bytes in the
> > > driver due to it is more meaningful for users.
> >
> > Thanks. I've queued the series locally, but the part I'm still wondering about is
> > how we advertise the enhanced filter.
> >
> > For example, how does userspace know whether or not it will get bursts or
> > bytes back when specifying an AXI filter? Should we create something like
> > caps/enhanced_filter which reads as 0/1 depending on whether or not the quirk
> > is set? You can look at intel-pt.c and arm_spe_pmu.c for examples of this sort
> > of thing.
> >
> > If you agree, please send a patch on top to implement this.
>
> Thanks Will, agree, I will implement this later.
Given that it's ABI, please can you do it this week so that we have
something consistent for 5.5?
Will
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next prev parent reply other threads:[~2019-11-04 12:32 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-01 8:36 [PATCH V3 1/4] docs/perf: Add explanation for DDR_CAP_AXI_ID_FILTER_ENHANCED quirk Joakim Zhang
2019-11-01 8:36 ` [PATCH V3 2/4] bindings: perf: imx-ddr: Add new compatible string Joakim Zhang
2019-11-01 8:36 ` [PATCH V3 3/4] perf/imx_ddr: Add enhanced AXI ID filter support Joakim Zhang
2019-11-01 15:16 ` Will Deacon
2019-11-04 1:21 ` Joakim Zhang
2019-11-04 12:32 ` Will Deacon [this message]
2019-11-04 14:54 ` Will Deacon
2019-11-01 8:36 ` [PATCH V3 4/4] perf/imx_ddr: Add driver for DDR PMU in i.MX8MPlus Joakim Zhang
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