From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 976AFFC6198 for ; Fri, 8 Nov 2019 22:07:22 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6A4D92084D for ; Fri, 8 Nov 2019 22:07:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="QlOl6Gvi"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="qmmxDqIc" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6A4D92084D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Message-Id:Date:Subject:To:From: References:In-Reply-To:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=sulTNG5TtlEfHRiXawq/S7QRu8pXIAdDRVwe9InXNIM=; b=QlOl6GvinnDqSe vjMl9ZFaX+IrufBXbbG0fvxXd46CaB7Sn+ZpWQnAJwen3/0e85MxSzUJFX2ibD01Zf/u+pMBqiqcR +AkDwpAQOI6A5AfYv3zlAYz5BGw/ETX8d8yecRnBI3/bDEI3370jRqE4BxB9w1eJSFAKKj1Q/vyXu yh7kXlcq77J2zS3pWM0cuOhkWS1bFHSigc9OosG0OcdPDnGpFPSfH7Kc6tl0xYwHWM8jeqX6KORfH UXv1Gj+dSuNSlO/+DVdp/2cLhALcMIrmRX7hhhtCLfZbaeNe6Mv0vYaiFbjmdD6IN2+szZTh3Gnd7 QSvdJ01t9khdq2XS4Jeg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1iTCPZ-0003e5-KY; Fri, 08 Nov 2019 22:07:21 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1iTCPV-0003ca-HW; Fri, 08 Nov 2019 22:07:18 +0000 Received: from kernel.org (unknown [104.132.0.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 150422084D; Fri, 8 Nov 2019 22:07:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1573250837; bh=F9598YJ7umblSSscgKD6bsQHkgKqFEeeQhpYqMVujj0=; h=In-Reply-To:References:From:To:Cc:Subject:Date:From; b=qmmxDqIczTRF6/bWq+R0BzxMQqujVYIpWuBVIn4pclepcyJjht82PY/zGNpM0nanz 5aTU5BjMKzw1wakefOXN5VOhuvdNk+hHjnUMq6g6sYWZPfVEoq0pxJ5aK6ccWo4sGr R0J5rqpNkhSakh/X8E9tTnOwlwYQPaYhRN1B6tp0= MIME-Version: 1.0 In-Reply-To: <20191027162328.1177402-2-martin.blumenstingl@googlemail.com> References: <20191027162328.1177402-1-martin.blumenstingl@googlemail.com> <20191027162328.1177402-2-martin.blumenstingl@googlemail.com> From: Stephen Boyd To: Martin Blumenstingl , jbrunet@baylibre.com, khilman@baylibre.com, linux-amlogic@lists.infradead.org, narmstrong@baylibre.com Subject: Re: [PATCH v2 1/5] dt-bindings: clock: add the Amlogic Meson8 DDR clock controller binding User-Agent: alot/0.8.1 Date: Fri, 08 Nov 2019 14:07:16 -0800 Message-Id: <20191108220717.150422084D@mail.kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191108_140717_601438_639BD611 X-CRM114-Status: UNSURE ( 7.57 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, Rob Herring , Martin Blumenstingl , linux-kernel@vger.kernel.org, robh+dt@kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Quoting Martin Blumenstingl (2019-10-27 09:23:24) > Amlogic Meson8, Meson8b and Meson8m2 SoCs have a DDR clock controller in > the MMCBUS registers. There is no public documentation on this, but the > GPL u-boot sources from the Amlogic BSP show that: > - it uses the same XTAL input as the main clock controller > - it contains a PLL which seems to be implemented just like the other > PLLs in this SoC > - there is a power-of-two PLL post-divider > > Add the documentation and header file for this DDR clock controller. > > Reviewed-by: Rob Herring > Signed-off-by: Martin Blumenstingl > --- Acked-by: Stephen Boyd _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel