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Received: from shell.armlinux.org.uk ([2001:4d48:ad52:3201:5054:ff:fe00:4ec]:58496) by pandora.armlinux.org.uk with esmtpsa (TLSv1.2:ECDHE-RSA-AES256-GCM-SHA384:256) (Exim 4.90_1) (envelope-from ) id 1iXD2w-0004WR-7g; Tue, 19 Nov 2019 23:36:34 +0000 Received: from linux by shell.armlinux.org.uk with local (Exim 4.92) (envelope-from ) id 1iXD2v-00017q-EG; Tue, 19 Nov 2019 23:36:33 +0000 Date: Tue, 19 Nov 2019 23:36:33 +0000 From: Russell King - ARM Linux admin To: event Subject: Re: [PATCH] irq-gic: select all CPU's selected in interrupt affinity settings Message-ID: <20191119233633.GG25745@shell.armlinux.org.uk> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191119_153641_267117_3D3C70DC X-CRM114-Status: GOOD ( 16.55 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Nov 19, 2019 at 11:12:26PM +0000, event wrote: > So far only a CPU selected with top affinity bit was selected. This > resulted in all interrupts > being processed by CPU0 by default despite "FF" default affinity > setting for all interrupts Have you checked whether this causes _ALL_ CPUs in the mask to be delivered a single interrupt, thereby causing _ALL_ CPUs to be slowed down and hit the same locks at the same time. > --- > drivers/irqchip/irq-gic.c | 27 ++++++++++++++++----------- > 1 file changed, 16 insertions(+), 11 deletions(-) > > diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c > index 30ab62334..e6c6451ea 100644 > --- a/drivers/irqchip/irq-gic.c > +++ b/drivers/irqchip/irq-gic.c > @@ -331,25 +331,30 @@ static int gic_set_affinity(struct irq_data *d, > const struct cpumask *mask_val, > { > void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3); > unsigned int cpu, shift = (gic_irq(d) % 4) * 8; > - u32 val, mask, bit; > + u32 val, reg_mask, bits = 0; > unsigned long flags; > + const struct cpumask* cpu_mask; > > - if (!force) > - cpu = cpumask_any_and(mask_val, cpu_online_mask); > + if (force) > + cpu_mask = mask_val; > else > - cpu = cpumask_first(mask_val); > + cpu_mask = cpu_online_mask; > > - if (cpu >= NR_GIC_CPU_IF || cpu >= nr_cpu_ids) > - return -EINVAL; > + for_each_cpu_and(cpu, mask_val, cpu_mask) { > + if (cpu >= NR_GIC_CPU_IF || cpu >= nr_cpu_ids) { > + return -EINVAL; > + } > + bits |= gic_cpu_map[cpu]; > + } > > gic_lock_irqsave(flags); > - mask = 0xff << shift; > - bit = gic_cpu_map[cpu] << shift; > - val = readl_relaxed(reg) & ~mask; > - writel_relaxed(val | bit, reg); > + reg_mask = 0xff << shift; > + bits <<= shift; > + val = readl_relaxed(reg) & ~reg_mask; > + writel_relaxed(val | bits, reg); > gic_unlock_irqrestore(flags); > > - irq_data_update_effective_affinity(d, cpumask_of(cpu)); > + irq_data_update_effective_affinity(d, cpu_mask); > > return IRQ_SET_MASK_OK_DONE; > } > -- > 2.17.1 > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel > -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTC broadband for 0.8mile line in suburbia: sync at 12.1Mbps down 622kbps up According to speedtest.net: 11.9Mbps down 500kbps up _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel