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[2001:470:b8f6:1b::1]) by smtp.gmail.com with ESMTPSA id a74sm1950052ywe.42.2019.12.03.11.16.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Dec 2019 11:16:10 -0800 (PST) Received: from minyard.net (unknown [192.168.27.180]) by serve.minyard.net (Postfix) with ESMTPSA id BE1ED180058; Tue, 3 Dec 2019 19:16:09 +0000 (UTC) Date: Tue, 3 Dec 2019 13:16:08 -0600 From: Corey Minyard To: Marc Zyngier Subject: Re: [PATCH] arm64: Fix compile error with KVM and !HARDEN_BRANCH_PREDICTOR Message-ID: <20191203191608.GA2896@minyard.net> References: <20191127181040.20012-1-minyard@acm.org> <86pnhbywpo.wl-maz@kernel.org> <8274815953233fb2d522f216b36d7247@www.loen.fr> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <8274815953233fb2d522f216b36d7247@www.loen.fr> User-Agent: Mutt/1.9.4 (2018-02-28) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191203_111613_079603_D6B8FB93 X-CRM114-Status: GOOD ( 18.36 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: minyard@acm.org Cc: Stefan Wahren , Corey Minyard , Ard Biesheuvel , Andre Przywara , Catalin Marinas , Will Deacon , linux-arm-kernel Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Dec 03, 2019 at 06:45:46PM +0000, Marc Zyngier wrote: > On 2019-12-03 18:35, Ard Biesheuvel wrote: > > [...] > > > OK, I have prepared a branch that carries all these patches in the > > right order with the upstream commit reference added to the commit > > log. I'll send this out for review first, before actually sending it > > to -stable, unless anyone feels that this is a bad idea. > > > > arm64: KVM: Move BP hardening vectors into .hyp.text section > > arm64: insn: Add N immediate encoding > > arm64: insn: Add encoder for bitwise operations using literals > > arm64: KVM: Dynamically patch the kernel/hyp VA mask > > arm64: cpufeatures: Drop the ARM64_HYP_OFFSET_LOW feature flag > > arm64; insn: Add encoder for the EXTR instruction > > arm64: insn: Allow ADD/SUB (immediate) with LSL #12 > > arm64: KVM: Dynamically compute the HYP VA mask > > arm64: KVM: Introduce EL2 VA randomisation > > arm64: KVM: Move stashing of x0/x1 into the vector code itself > > arm64: KVM: Reserve 4 additional instructions in the BPI template > > arm64: KVM: Allow far branches from vector slots to the main vectors > > arm64: Make BP hardening slot counter available > > arm64: Move the content of bpi.S to hyp-entry.S > > My personal take on this is that it is *a lot* of code that affects > a very critical path, and I'm not completely sure that it is what > we want for something as dated as 4.14. That was my thought, too. I was just trying to fix a simple compile error. > > The only valuable reason I can think of (aside of the vulnerability > mitigation aspect) would be if we need to backport more code to > the exception entry path for EL2. I don't know if there is such > need yet. If that is the case, IMHO this should be backported as part of other things that require it. I don't know this code that well, but these changes seem to me more setup for allowing other things to be done. -corey > > M. > -- > Jazz is not dead. It just smells funny... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel