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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id c12sm1358241oic.27.2019.12.18.15.37.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2019 15:37:15 -0800 (PST) Date: Wed, 18 Dec 2019 17:37:14 -0600 From: Rob Herring To: Sai Prakash Ranjan Subject: Re: [PATCH 1/2] dt-bindings: edac: Add DT bindings for Kryo EDAC Message-ID: <20191218233714.GA30302@bogus> References: <0101016ed57a3259-eee09e9e-e99a-40f1-ab1c-63e58a42615c-000000@us-west-2.amazonses.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <0101016ed57a3259-eee09e9e-e99a-40f1-ab1c-63e58a42615c-000000@us-west-2.amazonses.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191218_153718_496204_6B547414 X-CRM114-Status: GOOD ( 19.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Tony Luck , psodagud@codeaurora.org, linux-arm-msm@vger.kernel.org, Stephen Boyd , tsoni@codeaurora.org, linux-kernel@vger.kernel.org, Evan Green , Bjorn Andersson , Robert Richter , Andy Gross , Borislav Petkov , James Morse , Mauro Carvalho Chehab , linux-arm-kernel@lists.infradead.org, linux-edac@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Dec 05, 2019 at 09:53:05AM +0000, Sai Prakash Ranjan wrote: > This adds DT bindings for Kryo EDAC implemented with RAS > extensions on KRYO{3,4}XX CPU cores for reporting of cache > errors. > > Signed-off-by: Sai Prakash Ranjan > --- > .../bindings/edac/qcom-kryo-edac.yaml | 67 +++++++++++++++++++ > 1 file changed, 67 insertions(+) > create mode 100644 Documentation/devicetree/bindings/edac/qcom-kryo-edac.yaml > > diff --git a/Documentation/devicetree/bindings/edac/qcom-kryo-edac.yaml b/Documentation/devicetree/bindings/edac/qcom-kryo-edac.yaml > new file mode 100644 > index 000000000000..1a39429a73b4 > --- /dev/null > +++ b/Documentation/devicetree/bindings/edac/qcom-kryo-edac.yaml > @@ -0,0 +1,67 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/edac/qcom-kryo-edac.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Kryo Error Detection and Correction(EDAC) > + > +maintainers: > + - Sai Prakash Ranjan > + > +description: | > + Kryo EDAC is defined to describe on-chip error detection and correction > + for the Kryo CPU cores which implement RAS extensions. It will report > + all Single Bit Errors and Double Bit Errors found in L1/L2 caches in > + in two registers ERXSTATUS_EL1 and ERXMISC0_EL1. L3-SCU cache errors > + are reported in ERR1STATUS and ERR1MISC0 registers. > + ERXSTATUS_EL1 - Selected Error Record Primary Status Register, EL1 > + ERXMISC0_EL1 - Selected Error Record Miscellaneous Register 0, EL1 > + ERR1STATUS - Error Record Primary Status Register > + ERR1MISC0 - Error Record Miscellaneous Register 0 > + Current implementation of Kryo ECC(Error Correcting Code) mechanism is > + based on interrupts. > + > +properties: > + compatible: > + enum: > + - qcom,kryo-edac > + > + interrupts: > + minItems: 1 > + maxItems: 4 > + items: > + - description: l1-l2 cache faultirq interrupt > + - description: l1-l2 cache errirq interrupt > + - description: l3-scu cache errirq interrupt > + - description: l3-scu cache faultirq interrupt > + > + interrupt-names: > + minItems: 1 > + maxItems: 4 You are saying only these combinations are valid: l1-l2-faultirq l1-l2-faultirq l1-l2-errirq l1-l2-faultirq l1-l2-errirq l3-scu-errirq l1-l2-faultirq l1-l2-errirq l3-scu-errirq l3-scu-faultirq Is that your intent? > + items: > + - const: l1-l2-faultirq > + - const: l1-l2-errirq > + - const: l3-scu-errirq > + - const: l3-scu-faultirq > + > +required: > + - compatible > + - interrupts > + - interrupt-names > + > +examples: > + - | > + #include > + > + kryo_edac { > + compatible = "qcom,kryo-edac"; > + interrupts = , > + , > + , > + ; > + interrupt-names = "l1-l2-faultirq", > + "l1-l2-errirq", > + "l3-scu-errirq", > + "l3-scu-faultirq"; > + }; > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > of Code Aurora Forum, hosted by The Linux Foundation > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel