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From: Sudeep Holla <sudeep.holla@arm.com>
To: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
	Linux PM <linux-pm@vger.kernel.org>,
	Stephen Boyd <sboyd@kernel.org>,
	linux-arm-msm <linux-arm-msm@vger.kernel.org>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	"Rafael J . Wysocki" <rjw@rjwysocki.net>,
	Andy Gross <agross@kernel.org>, Lina Iyer <ilina@codeaurora.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Kevin Hilman <khilman@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Sudeep Holla <sudeep.holla@arm.com>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v4 14/14] arm64: dts: Convert to the hierarchical CPU topology layout for MSM8916
Date: Thu, 19 Dec 2019 17:58:14 +0000	[thread overview]
Message-ID: <20191219175757.GA21846@bogus> (raw)
In-Reply-To: <CAPDyKFpkSjq5RzuxCvj8wawU6Q15qq3qiBcrGz=H2X+1Wf3t8w@mail.gmail.com>

On Thu, Dec 19, 2019 at 04:48:47PM +0100, Ulf Hansson wrote:
> On Thu, 19 Dec 2019 at 15:34, Sudeep Holla <sudeep.holla@arm.com> wrote:
> >
> > On Wed, Dec 11, 2019 at 04:43:43PM +0100, Ulf Hansson wrote:
> > > To enable the OS to better support PSCI OS initiated CPU suspend mode,
> > > let's convert from the flattened layout to the hierarchical layout.
> > >
> > > In the hierarchical layout, let's create a power domain provider per CPU
> > > and describe the idle states for each CPU inside the power domain provider
> > > node. To group the CPUs into a cluster, let's add another power domain
> > > provider and make it act as the master domain. Note that, the CPU's idle
> > > states remains compatible with "arm,idle-state", while the cluster's idle
> > > state becomes compatible with "domain-idle-state".
> > >
> > > Co-developed-by: Lina Iyer <lina.iyer@linaro.org>
> > > Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
> > > Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
> > > ---
> > >
> > > Changes in v4:
> > >       - None.
> > >
> > > ---
> > >  arch/arm64/boot/dts/qcom/msm8916.dtsi | 57 +++++++++++++++++++++++++--
> > >  1 file changed, 53 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> > > index 8686e101905c..282c36c8fa3b 100644
> > > --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> > > +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> > > @@ -102,10 +102,11 @@
> > >                       reg = <0x0>;
> > >                       next-level-cache = <&L2_0>;
> > >                       enable-method = "psci";
> > > -                     cpu-idle-states = <&CPU_SLEEP_0>;
> > >                       clocks = <&apcs>;
> > >                       operating-points-v2 = <&cpu_opp_table>;
> > >                       #cooling-cells = <2>;
> > > +                     power-domains = <&CPU_PD0>;
> > > +                     power-domain-names = "psci";
> > >               };
> > >
> > >               CPU1: cpu@1 {
> > > @@ -114,10 +115,11 @@
> > >                       reg = <0x1>;
> > >                       next-level-cache = <&L2_0>;
> > >                       enable-method = "psci";
> > > -                     cpu-idle-states = <&CPU_SLEEP_0>;
> > >                       clocks = <&apcs>;
> > >                       operating-points-v2 = <&cpu_opp_table>;
> > >                       #cooling-cells = <2>;
> > > +                     power-domains = <&CPU_PD1>;
> > > +                     power-domain-names = "psci";
> > >               };
> > >
> > >               CPU2: cpu@2 {
> > > @@ -126,10 +128,11 @@
> > >                       reg = <0x2>;
> > >                       next-level-cache = <&L2_0>;
> > >                       enable-method = "psci";
> > > -                     cpu-idle-states = <&CPU_SLEEP_0>;
> > >                       clocks = <&apcs>;
> > >                       operating-points-v2 = <&cpu_opp_table>;
> > >                       #cooling-cells = <2>;
> > > +                     power-domains = <&CPU_PD2>;
> > > +                     power-domain-names = "psci";
> > >               };
> > >
> > >               CPU3: cpu@3 {
> > > @@ -138,10 +141,11 @@
> > >                       reg = <0x3>;
> > >                       next-level-cache = <&L2_0>;
> > >                       enable-method = "psci";
> > > -                     cpu-idle-states = <&CPU_SLEEP_0>;
> > >                       clocks = <&apcs>;
> > >                       operating-points-v2 = <&cpu_opp_table>;
> > >                       #cooling-cells = <2>;
> > > +                     power-domains = <&CPU_PD3>;
> > > +                     power-domain-names = "psci";
> > >               };
> > >
> > >               L2_0: l2-cache {
> > > @@ -161,12 +165,57 @@
> > >                               min-residency-us = <2000>;
> > >                               local-timer-stop;
> > >                       };
> > > +
> > > +                     CLUSTER_RET: cluster-retention {
> > > +                             compatible = "domain-idle-state";
> > > +                             arm,psci-suspend-param = <0x41000012>;
> >
> > If I followed the thread correctly, we are now just using the param as is
> > without any extra logic like ORing like before. i.e. The domain state
> > parameter overrides the any param below it in the hierarchy.
> >
> > If that's correct, then
>
> That's correct!
>

Thanks for the confirmation.

--
Regards,
Sudeep

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  reply	other threads:[~2019-12-19 17:58 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-11 15:43 [PATCH v4 00/14] cpuidle: psci: Support hierarchical CPU arrangement Ulf Hansson
2019-12-11 15:43 ` [PATCH v4 01/14] cpuidle: psci: Align psci_power_state count with idle state count Ulf Hansson
2019-12-11 15:43 ` [PATCH v4 02/14] dt: psci: Update DT bindings to support hierarchical PSCI states Ulf Hansson
2019-12-11 15:43 ` [PATCH v4 03/14] firmware: psci: Export functions to manage the OSI mode Ulf Hansson
2019-12-11 15:43 ` [PATCH v4 04/14] of: base: Add of_get_cpu_state_node() to get idle states for a CPU node Ulf Hansson
2019-12-11 15:43 ` [PATCH v4 05/14] cpuidle: dt: Support hierarchical CPU idle states Ulf Hansson
2019-12-11 15:43 ` [PATCH v4 06/14] cpuidle: psci: Simplify OF parsing of CPU idle state nodes Ulf Hansson
2019-12-11 15:43 ` [PATCH v4 07/14] cpuidle: psci: Support hierarchical CPU idle states Ulf Hansson
2019-12-11 15:43 ` [PATCH v4 08/14] cpuidle: psci: Add a helper to attach a CPU to its PM domain Ulf Hansson
2019-12-19 14:30   ` Sudeep Holla
2019-12-11 15:43 ` [PATCH v4 09/14] cpuidle: psci: Attach CPU devices to their PM domains Ulf Hansson
2019-12-19 14:30   ` Sudeep Holla
2019-12-11 15:43 ` [PATCH v4 10/14] cpuidle: psci: Prepare to use OS initiated suspend mode via " Ulf Hansson
2019-12-19 14:31   ` Sudeep Holla
2019-12-19 15:48     ` Ulf Hansson
2019-12-19 18:01       ` Sudeep Holla
2019-12-19 21:33         ` Ulf Hansson
2019-12-20 10:01           ` Sudeep Holla
2019-12-20 11:33             ` Ulf Hansson
2019-12-11 15:43 ` [PATCH v4 11/14] cpuidle: psci: Manage runtime PM in the idle path Ulf Hansson
2019-12-19 14:32   ` Sudeep Holla
2019-12-11 15:43 ` [PATCH v4 12/14] cpuidle: psci: Support CPU hotplug for the hierarchical model Ulf Hansson
2019-12-19 14:33   ` Sudeep Holla
2019-12-19 15:48     ` Ulf Hansson
2019-12-11 15:43 ` [PATCH v4 13/14] cpuidle: psci: Add support for PM domains by using genpd Ulf Hansson
2019-12-19 14:34   ` Sudeep Holla
2019-12-19 15:48     ` Ulf Hansson
2019-12-19 18:06       ` Sudeep Holla
2019-12-19 22:02         ` Ulf Hansson
2019-12-20 10:07           ` Sudeep Holla
2019-12-20 11:27             ` Ulf Hansson
2019-12-20 12:01               ` Sudeep Holla
2019-12-11 15:43 ` [PATCH v4 14/14] arm64: dts: Convert to the hierarchical CPU topology layout for MSM8916 Ulf Hansson
2019-12-19 14:34   ` Sudeep Holla
2019-12-19 15:48     ` Ulf Hansson
2019-12-19 17:58       ` Sudeep Holla [this message]
2019-12-18  7:36 ` [PATCH v4 00/14] cpuidle: psci: Support hierarchical CPU arrangement Ulf Hansson
2019-12-18 10:25   ` Sudeep Holla

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