Re: [PATCH] dt-bindings: usb: Convert Allwinner A80 USB PHY controller to a schema

[Maxime Ripard <maxime@cerno.tech>]

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Hi,

On Thu, Dec 19, 2019 at 11:24:52PM +0800, Chen-Yu Tsai wrote:
> On Thu, Dec 19, 2019 at 4:43 PM Maxime Ripard <maxime@cerno.tech> wrote:
> >
> > The Allwinner A80 SoCs have a USB PHY controller that is used by Linux,
> > with a matching Device Tree binding.
> >
> > Now that we have the DT validation in place, let's convert the device tree
> > bindings for that controller over to a YAML schemas.
> >
> > Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> > ---
> >  .../phy/allwinner,sun9i-a80-usb-phy.yaml      | 135 ++++++++++++++++++
> >  .../devicetree/bindings/phy/sun9i-usb-phy.txt |  37 -----
> >  2 files changed, 135 insertions(+), 37 deletions(-)
> >  create mode 100644 Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml
> >  delete mode 100644 Documentation/devicetree/bindings/phy/sun9i-usb-phy.txt
> >
> > diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml
> > new file mode 100644
> > index 000000000000..ded7d6f0a119
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml
> > @@ -0,0 +1,135 @@
> > +# SPDX-License-Identifier: GPL-2.0
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/phy/allwinner,sun9i-a80-usb-phy.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Allwinner A80 USB PHY Device Tree Bindings
> > +
> > +maintainers:
> > +  - Chen-Yu Tsai <wens@csie.org>
> > +  - Maxime Ripard <mripard@kernel.org>
> > +
> > +properties:
> > +  "#phy-cells":
> > +    const: 0
> > +
> > +  compatible:
> > +    const: allwinner,sun9i-a80-usb-phy
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  clocks:
> > +    anyOf:
> > +      - description: Main PHY Clock
> > +
> > +      - items:
> > +          - description: Main PHY clock
> > +          - description: HSIC 12MHz clock
> > +          - description: HSIC 480MHz clock
> > +
> > +  clock-names:
> > +    oneOf:
> > +      - const: phy
> > +
> > +      - items:
> > +          - const: phy
> > +          - const: hsic_12M
> > +          - const: hsic_480M
> > +
> > +  resets:
> > +    anyOf:
> > +      - description: Normal USB PHY reset
> > +
> > +      - items:
> > +          - description: Normal USB PHY reset
> > +          - description: HSIC Reset
> > +
> > +  reset-names:
> > +    oneOf:
> > +      - const: phy
> > +
> > +      - items:
> > +          - const: phy
> > +          - const: hsic
> > +
> > +  phy_type:
> > +    const: hsic
> > +    description:
> > +      When absent, the PHY type will be assumed to be normal USB.
> > +
> > +  phy-supply:
> > +    description:
> > +      Regulator that powers VBUS
> > +
> > +required:
> > +  - "#phy-cells"
> > +  - compatible
> > +  - reg
> > +  - clocks
> > +  - clock-names
> > +  - resets
> > +  - reset-names
> > +
> > +additionalProperties: false
> > +
> > +if:
> > +  properties:
> > +    phy_type:
> > +      const: hsic
> > +
> > +  required:
> > +    - phy_type
> > +
> > +then:
> > +  properties:
> > +    clocks:
> > +      maxItems: 3
> > +
> > +    clock-names:
> > +      maxItems: 3
> > +
> > +    resets:
> > +      maxItems: 2
> > +
> > +    reset-names:
> > +      maxItems: 2
>
> So this is slightly incorrect. If phy_type == "hsic", then the
> "phy" clock and reset should not be needed. I say should because
> no boards actually came with HSIC implemented. The A80 Optimus
> board had the HSIC lines on one of the GPIO headers, but I never
> had any HSIC chips lol.

This isn't what the previous binding was saying though :/

> > -- phy_type : "hsic" for HSIC usage;
> > -            other values or absence of this property indicates normal USB
> > -- clocks : phandle + clock specifier for the phy clocks
> > -- clock-names : depending on the "phy_type" property,
> > -  * "phy" for normal USB
> > -  * "hsic_480M", "hsic_12M" for HSIC
> > -- resets : a list of phandle + reset specifier pairs
> > -- reset-names : depending on the "phy_type" property,
> > -  * "phy" for normal USB
> > -  * "hsic" for HSIC

It's speficied that the reset and clock is needed. If we want to
revise that, we can do it, but I guess it should be in a separate
patch than the one doing the conversion. Here we just want to express
the exact same thing.

Maxime

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