From: Thierry Reding <thierry.reding@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org,
Rob Herring <robh+dt@kernel.org>,
linux-arm-kernel@lists.infradead.org,
Jon Hunter <jonathanh@nvidia.com>
Subject: [PATCH 12/13] arm64: tegra: Add external memory controller on Tegra186
Date: Sun, 22 Dec 2019 15:10:34 +0100 [thread overview]
Message-ID: <20191222141035.1649937-13-thierry.reding@gmail.com> (raw)
In-Reply-To: <20191222141035.1649937-1-thierry.reding@gmail.com>
From: Thierry Reding <treding@nvidia.com>
Add the external memory controller as a child device of the memory
controller on Tegra186. The memory controller really represents the
memory subsystem that encompasses both the memory and external memory
controllers. The external memory controller uses the BPMP to obtain the
list of supported EMC frequencies and set the EMC frequency.
Also set up the dma-ranges property to describe that all memory clients
can address up to 40 bits using the memory controller client interface
(MCCIF), unless otherwise limited by the DMA engines of the hardware.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 584498a999d4..dba7f57469c5 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -144,6 +144,27 @@ memory-controller@2c00000 {
reg = <0x0 0x02c00000 0x0 0xb0000>;
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ ranges = <0x0 0x02c00000 0x0 0x02c00000 0x0 0xb0000>;
+
+ /*
+ * Memory clients have access to all 40 bits that the memory
+ * controller can address.
+ */
+ dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
+
+ emc: external-memory-controller@2c60000 {
+ compatible = "nvidia,tegra186-emc";
+ reg = <0x0 0x02c60000 0x0 0x50000>;
+ interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&bpmp TEGRA186_CLK_EMC>;
+ clock-names = "emc";
+
+ nvidia,bpmp = <&bpmp>;
+ };
};
timer@3010000 {
--
2.24.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-12-22 14:14 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-22 14:10 [PATCH 00/13] memory: tegra: Add Tegra186/Tegra194 support Thierry Reding
2019-12-22 14:10 ` [PATCH 01/13] dt-bindings: memory: Add Tegra186 memory client IDs Thierry Reding
2020-01-08 16:14 ` Rob Herring
2019-12-22 14:10 ` [PATCH 02/13] dt-bindings: memory: Add Tegra194 memory controller header Thierry Reding
2020-01-08 16:15 ` Rob Herring
2019-12-22 14:10 ` [PATCH 03/13] dt-bindings: memory: Add Tegra186 memory subsystem Thierry Reding
2020-01-08 16:19 ` Rob Herring
2019-12-22 14:10 ` [PATCH 04/13] memory: tegra: Rename tegra_mc to tegra186_mc on Tegra186 Thierry Reding
2019-12-22 14:10 ` [PATCH 05/13] memory: tegra: Add per-SoC data for Tegra186 Thierry Reding
2019-12-22 14:10 ` [PATCH 06/13] memory: tegra: Extract memory client SID programming Thierry Reding
2019-12-22 14:10 ` [PATCH 07/13] memory: tegra: Add system sleep support Thierry Reding
2019-12-22 14:10 ` [PATCH 08/13] memory: tegra: Support DVFS on Tegra186 and later Thierry Reding
2019-12-22 14:10 ` [PATCH 09/13] memory: tegra: Only include support for enabled SoCs Thierry Reding
2019-12-22 14:10 ` [PATCH 10/13] memory: tegra: Add support for the Tegra194 memory controller Thierry Reding
2019-12-22 14:10 ` [PATCH 11/13] arm64: tegra: Add interrupt for memory controller on Tegra186 Thierry Reding
2019-12-22 14:10 ` Thierry Reding [this message]
2019-12-22 14:10 ` [PATCH 13/13] arm64: tegra: Add the memory subsystem on Tegra194 Thierry Reding
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20191222141035.1649937-13-thierry.reding@gmail.com \
--to=thierry.reding@gmail.com \
--cc=devicetree@vger.kernel.org \
--cc=jonathanh@nvidia.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-tegra@vger.kernel.org \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).