* Re: [PATCH v4 4/5] clk: rockchip: add pll up and down when change pll freq
[not found] ` <20191204081859.19454-5-zhangqing@rock-chips.com>
@ 2019-12-30 19:06 ` Stephen Boyd
0 siblings, 0 replies; only message in thread
From: Stephen Boyd @ 2019-12-30 19:06 UTC (permalink / raw)
To: Elaine Zhang, heiko
Cc: huangtao, xf, mturquette, Elaine Zhang, linux-kernel, linux-clk,
linux-rockchip, xxx, linux-arm-kernel
Quoting Elaine Zhang (2019-12-04 00:18:58)
> set pll sequence:
> ->set pll to slow mode or other plls
> ->set pll down
> ->set pll params
> ->set pll up
> ->wait pll lock status
> ->set pll to normal mode
>
> To slove the system error:
s/slove/solve/
> wait_pll_lock: timeout waiting for pll to lock
> pll_set_params: pll update unsucessful,
> trying to restore old params
>
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
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