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From: Jagan Teki <jagan@amarulasolutions.com>
To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej.skrabec@siol.net>,
	Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org, David Airlie <airlied@linux.ie>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-sunxi <linux-sunxi@googlegroups.com>,
	Jagan Teki <jagan@amarulasolutions.com>,
	Daniel Vetter <daniel@ffwll.ch>,
	linux-amarula@amarulasolutions.com,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 4/9] drm/sun4i: tcon_top: Use clock name index macros
Date: Tue, 31 Dec 2019 18:35:23 +0530	[thread overview]
Message-ID: <20191231130528.20669-5-jagan@amarulasolutions.com> (raw)
In-Reply-To: <20191231130528.20669-1-jagan@amarulasolutions.com>

TCON TOP mux blocks in R40 are registering clock using
tcon top clock index numbers.

Right now the code is using, real numbers start with 0, but
we have proper macros that defined these name index numbers.

Use the existing macros, instead of real numbers for more
code readability.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
Changes for v3:
- none

 drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
index 75d8e60c149d..e0b3c5330b9a 100644
--- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
+++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
@@ -194,19 +194,22 @@ static int sun8i_tcon_top_bind(struct device *dev, struct device *master,
 	clk_data->hws[CLK_TCON_TOP_TV0] =
 		sun8i_tcon_top_register_gate(dev, "tcon-tv0", regs,
 					     &tcon_top->reg_lock,
-					     TCON_TOP_TCON_TV0_GATE, 0);
+					     TCON_TOP_TCON_TV0_GATE,
+					     CLK_TCON_TOP_TV0);
 
 	if (quirks->has_tcon_tv1)
 		clk_data->hws[CLK_TCON_TOP_TV1] =
 			sun8i_tcon_top_register_gate(dev, "tcon-tv1", regs,
 						     &tcon_top->reg_lock,
-						     TCON_TOP_TCON_TV1_GATE, 1);
+						     TCON_TOP_TCON_TV1_GATE,
+						     CLK_TCON_TOP_TV1);
 
 	if (quirks->has_dsi)
 		clk_data->hws[CLK_TCON_TOP_DSI] =
 			sun8i_tcon_top_register_gate(dev, "dsi", regs,
 						     &tcon_top->reg_lock,
-						     TCON_TOP_TCON_DSI_GATE, 2);
+						     TCON_TOP_TCON_DSI_GATE,
+						     CLK_TCON_TOP_DSI);
 
 	for (i = 0; i < CLK_NUM; i++)
 		if (IS_ERR(clk_data->hws[i])) {
-- 
2.18.0.321.gffc6fa0e3


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  parent reply	other threads:[~2019-12-31 13:07 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-31 13:05 [PATCH v3 0/9] drm/sun4i: Allwinner R40 MIPI-DSI support Jagan Teki
2019-12-31 13:05 ` [PATCH v3 1/9] dt-bindings: display: Add TCON LCD compatible for R40 Jagan Teki
2019-12-31 13:05 ` [PATCH v3 2/9] drm/sun4i: tcon: Add TCON LCD support " Jagan Teki
2020-01-02 10:54   ` Maxime Ripard
2020-01-02 15:40     ` Jagan Teki
2020-01-02 15:47       ` Maxime Ripard
2020-01-02 16:34         ` Jagan Teki
2020-01-04 14:20           ` Maxime Ripard
2019-12-31 13:05 ` [PATCH v3 3/9] ARM: dts: sun8i: r40: Use tcon top clock index macros Jagan Teki
2020-01-02 10:55   ` Maxime Ripard
2019-12-31 13:05 ` Jagan Teki [this message]
2019-12-31 13:05 ` [PATCH v3 5/9] drm/sun4i: tcon_top: Register reset, clock gates in probe Jagan Teki
2019-12-31 13:05 ` [PATCH v3 6/9] dt-bindings: sun6i-dsi: Add R40 DPHY compatible (w/ A31 fallback) Jagan Teki
2020-01-02 11:03   ` Maxime Ripard
2020-01-02 15:43     ` Jagan Teki
2019-12-31 13:05 ` [PATCH v3 7/9] dt-bindings: sun6i-dsi: Document R40 MIPI-DSI controller (w/ A64 fallback) Jagan Teki
2020-01-02 11:04   ` Maxime Ripard
2019-12-31 13:05 ` [PATCH v3 8/9] ARM: dts: sun8i: r40: Add MIPI DSI pipeline Jagan Teki
2019-12-31 13:05 ` [DO NOT MERGE] [PATCH v3 9/9] ARM: dts: sun8i-r40: bananapi-m2-ultra: Enable Bananapi S070WV20-CT16 Jagan Teki

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