* [PATCH 1/2] arm64: dts: imx8mm: Add CAAM node
@ 2020-01-01 17:50 Michael Trimarchi
2020-01-01 17:50 ` [PATCH 2/2] crypto: caam - add clock entry for i.MX8MM Michael Trimarchi
2020-01-01 22:41 ` [PATCH 1/2] arm64: dts: imx8mm: Add CAAM node Adam Ford
0 siblings, 2 replies; 3+ messages in thread
From: Michael Trimarchi @ 2020-01-01 17:50 UTC (permalink / raw)
To: Shawn Guo
Cc: Mark Rutland, Aymen Sghaier, Herbert Xu, linux-amarula,
Sascha Hauer, linux-kernel, Rob Herring, NXP Linux Team,
Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel,
linux-crypto
Add node for CAAM - Cryptographic Acceleration and Assurance Module.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 31 +++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 7360dc0685eb..428a8b43086e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -667,6 +667,37 @@
status = "disabled";
};
+ crypto: crypto@30900000 {
+ compatible = "fsl,sec-v4.0";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x30900000 0x40000>;
+ ranges = <0 0x30900000 0x40000>;
+ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_AHB>,
+ <&clk IMX8MM_CLK_IPG_ROOT>;
+ clock-names = "aclk", "ipg";
+ status = "disabled";
+
+ sec_jr0: jr0@1000 {
+ compatible = "fsl,sec-v4.0-job-ring";
+ reg = <0x1000 0x1000>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ sec_jr1: jr1@2000 {
+ compatible = "fsl,sec-v4.0-job-ring";
+ reg = <0x2000 0x1000>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ sec_jr2: jr2@3000 {
+ compatible = "fsl,sec-v4.0-job-ring";
+ reg = <0x3000 0x1000>;
+ interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
i2c1: i2c@30a20000 {
compatible = "fsl,imx8mm-i2c", "fsl,imx21-i2c";
#address-cells = <1>;
--
2.17.1
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^ permalink raw reply related [flat|nested] 3+ messages in thread* [PATCH 2/2] crypto: caam - add clock entry for i.MX8MM
2020-01-01 17:50 [PATCH 1/2] arm64: dts: imx8mm: Add CAAM node Michael Trimarchi
@ 2020-01-01 17:50 ` Michael Trimarchi
2020-01-01 22:41 ` [PATCH 1/2] arm64: dts: imx8mm: Add CAAM node Adam Ford
1 sibling, 0 replies; 3+ messages in thread
From: Michael Trimarchi @ 2020-01-01 17:50 UTC (permalink / raw)
To: Shawn Guo
Cc: Mark Rutland, Aymen Sghaier, Herbert Xu, linux-amarula,
Sascha Hauer, linux-kernel, Rob Herring, NXP Linux Team,
Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel,
linux-crypto
Add clock entry needed to support i.MX8MM.
[ 1.040682] caam 30900000.crypto: Entropy delay = 3200
[ 1.045935] caam 30900000.crypto: Entropy delay = 3600
[ 1.118813] caam 30900000.crypto: Instantiated RNG4 SH0
[ 1.186476] caam 30900000.crypto: Instantiated RNG4 SH1
[ 1.191726] caam 30900000.crypto: device ID = 0x0a16040100000000 (Era 9)
[ 1.198434] caam 30900000.crypto: job rings = 3, qi = 0
[ 1.222717] caam algorithms registered in /proc/crypto
[ 1.231297] caam 30900000.crypto: caam pkc algorithms registered in /proc/crypto
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
drivers/crypto/caam/ctrl.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index d7c3c3805693..ab8df3b550a7 100644
--- a/drivers/crypto/caam/ctrl.c
+++ b/drivers/crypto/caam/ctrl.c
@@ -99,10 +99,11 @@ static inline int run_descriptor_deco0(struct device *ctrldev, u32 *desc,
if (ctrlpriv->virt_en == 1 ||
/*
- * Apparently on i.MX8MQ it doesn't matter if virt_en == 1
+ * Apparently on i.MX8MQ and i.MX8MM it doesn't matter if virt_en == 1
* and the following steps should be performed regardless
*/
- of_machine_is_compatible("fsl,imx8mq")) {
+ of_machine_is_compatible("fsl,imx8mq") ||
+ of_machine_is_compatible("fsl,imx8mm")) {
clrsetbits_32(&ctrl->deco_rsr, 0, DECORSR_JR0);
while (!(rd_reg32(&ctrl->deco_rsr) & DECORSR_VALID) &&
@@ -509,6 +510,7 @@ static const struct soc_device_attribute caam_imx_soc_table[] = {
{ .soc_id = "i.MX6*", .data = &caam_imx6_data },
{ .soc_id = "i.MX7*", .data = &caam_imx7_data },
{ .soc_id = "i.MX8MQ", .data = &caam_imx7_data },
+ { .soc_id = "i.MX8MM", .data = &caam_imx7_data },
{ .family = "Freescale i.MX" },
{ /* sentinel */ }
};
--
2.17.1
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH 1/2] arm64: dts: imx8mm: Add CAAM node
2020-01-01 17:50 [PATCH 1/2] arm64: dts: imx8mm: Add CAAM node Michael Trimarchi
2020-01-01 17:50 ` [PATCH 2/2] crypto: caam - add clock entry for i.MX8MM Michael Trimarchi
@ 2020-01-01 22:41 ` Adam Ford
1 sibling, 0 replies; 3+ messages in thread
From: Adam Ford @ 2020-01-01 22:41 UTC (permalink / raw)
To: Michael Trimarchi
Cc: Mark Rutland, Aymen Sghaier, Herbert Xu, Shawn Guo, Sascha Hauer,
Linux Kernel Mailing List, Fabio Estevam, Rob Herring,
NXP Linux Team, Pengutronix Kernel Team, linux-amarula, arm-soc,
linux-crypto
On Wed, Jan 1, 2020 at 11:50 AM Michael Trimarchi
<michael@amarulasolutions.com> wrote:
>
> Add node for CAAM - Cryptographic Acceleration and Assurance Module.
>
I believe a series similar to this was already done and applied:
https://patchwork.kernel.org/patch/11300663/
adam
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 31 +++++++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index 7360dc0685eb..428a8b43086e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -667,6 +667,37 @@
> status = "disabled";
> };
>
> + crypto: crypto@30900000 {
> + compatible = "fsl,sec-v4.0";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0x30900000 0x40000>;
> + ranges = <0 0x30900000 0x40000>;
> + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MM_CLK_AHB>,
> + <&clk IMX8MM_CLK_IPG_ROOT>;
> + clock-names = "aclk", "ipg";
> + status = "disabled";
> +
> + sec_jr0: jr0@1000 {
> + compatible = "fsl,sec-v4.0-job-ring";
> + reg = <0x1000 0x1000>;
> + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + sec_jr1: jr1@2000 {
> + compatible = "fsl,sec-v4.0-job-ring";
> + reg = <0x2000 0x1000>;
> + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + sec_jr2: jr2@3000 {
> + compatible = "fsl,sec-v4.0-job-ring";
> + reg = <0x3000 0x1000>;
> + interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
> + };
> + };
> +
> i2c1: i2c@30a20000 {
> compatible = "fsl,imx8mm-i2c", "fsl,imx21-i2c";
> #address-cells = <1>;
> --
> 2.17.1
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 3+ messages in thread
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